PGA309: One Bit error on PGA309 EEPROM Read

Hello Raghavendra,

Regarding the question on the maximum capacitance on the PRG pin (question in the attachment), this PRG line maximum capacitance tends to be limited by the ability of the controller to drive the capacitance on the PRG line high, while meeting the one-wire rise time, at 0.5% maximum of Baud rate.  In order to program the device on a module with large capacitance on PRG (for example, with Cload = 10nF on PRG pin), the customer programmer must use a PRG speed-up circuit to drive the PRG high to obtain a reasonable rising edge in logic '0' to logic '1' transitions.  For example, on the PGA309EVM-USB evaluation board, the USB DAQ controller board uses the "One-Wire Speed Up Circuit" documented on page 11 of the USB DAQ platform user guide, for applications where the PRG pin has a large 10nF load capacitor.  This is also mentioned/discussed briefly on the PGA309 User Guide on page 93. Your diagram shows that the load is 100pF.  

I have reviewed the attached power-point describing the issue. A couple of questions:

- If I understood correctly, this issue occurs while reading directly the EEPROM through the 2-wire interface, and also while reading the EEPROM through the PRG UART interface on about 15% of the units,  I am assuming since this is seen on both the PRG and 2-wire that the issue may not be related to the PRG interface. Is this correct? or are there any issues reading PGA309 registers through the one-wire?

- Is the EEPROM in close proximity to the PGA309?  Are there additional pull-up resistors on the 2-wire interface?

- The ppt shows plots of the 1-wire PRG oscilloscope transactions.  Is it possible to obtain oscilloscope plots of the 2-wire EEPROM transactions? Is this issue occurring while reading any EEPROM register or a specific register?  Please ensure that the oscilloscope probes are directly connected or in very close proximity to the PGA309 2-wire interface.

Thank you and Regards, 

Luis

Hi,

All the time I am using one wire PRG communication to Read EEPROM. I did try to read the PGA registers too and did see same Error.

I have attached the error seen while reading the Internal registers. ( refer slide no 5)

Yes. EEPROM & PGA309 are mounted close to each other. I have attached PCBA view to confirm the same. There are no additional pullups on the SCL and SDA lines.

to me it does not look like issue related to EEPROM read, I feel something to do with one wire PRG interface.

Issue is seen on one or multiple registers at a time.

thanks,

Raghavendra 5861.WU_Communication_Issue.pptx

HI Raghavendra,

1) On the oscilloscope plots provided, Are the oscilloscope probes connected right at the DGND and PRG pins of the PGA309 or are the oscilloscope probes placed at the controller side? If the probes were placed at the controller side, can you please provide the oscilloscope plot of both a working unit and a non-working unit reading the same PGA309 register transaction, this time placing the oscilloscope probes at pin 12 (PRG) refer to pin 11 (GNDD), right at the pins of the PGA309 device?

2) Is is possible to get a second set of zoomed-in oscilloscope plots, with time scale in microsecond range, capturing the rise time and the fall time on PRG, when PRG is driven by the controller during the S and Initialization Byte (55h).

3) For a experiment, does replacing the ferrite FB6 (on PRG pin) with a 100-Ohm resistor, Ferrite FB5 connecting Digital GND and analog GND with 0-Ohm, and removing C17 make a difference on the communication and/or rising/fall time?  Are there any other capacitances on the PRG line? Is this a long cable to the microcontroller?

Thank you and Regards,

Luis 

HI Raghavendra,

Please let us know if the issue persists.  If the issue has not been resolved, if possible, kindly provide oscilloscope plots placing the probes right at pin 12 (PRG) and (GNDD) pins of the PGA309. If possible, obtain a second zoomed-in plot in the microsecond range, showing the PRG rise/fall time, on the PGA309 side, when PRG is driven by the controller during the Initialization Byte (55h).

The PGA309 PRG I/O pin is an open-drain (collector), where the device can only pull the PRG pin low and relies on external pull-up circuitry or the controller to set the pin high and charge the capacitance on the PRG pin.   

Thank you,

Best Regards,

Luis  

Hi Luis,

I was not able to complete taking these waveforms. will respond with more details by early next week.

sorry for the delay.

thanks,

Raghavendra 

HI Raghavendra,

Thank you for the update. We will discuss when data is available at your convenience.

Thank you and Regards,

Luis

Hi Luis,

on the further analysis I found that in production there was a EEPROM read and -40C temp and final write to EEPROM was happening at -40C deg.We changed the temperature profile so that there is no EEPROM Read / Write at -40C and this gave us good improvement on the issue. On couple of samples I could easily simulate this condition where communication was good till -20C and it had a read error when we read EEPROM at -40C.

I have asked for few more failed PCBAs for further analysis and will post my findings once I have the PCBAs at my place.

Meanwhile what is your thoughts on Read Failure at -40C ?

thanks,

Raghavendra

Hi Raghavendra,

Thank you for the update.

From your previous post explanation, I am assuming the issue is related to the 1-wire interface (PRG pin) communication and not to the EEPROM 2-wire interface; please let me know if this is not the case.

The PGA309 PRG I/O pin is only an open-drain (collector), where the PGA309 device can only pull the PRG pin low and relies on the controller or external pull-up resistors (or external circuitry) to re-charge any capacitance on the1-wire bus.  The challenges with intermittent communication I have encountered have been related to the capacitance on the 1-wire when using a long connection; or when the circuit designer places a large capacitance on the PRG pin for circuit protection purposes, and the controller is unable to meet the rise time requirement. In some cases, an additional smaller or local pull-up resistor is required, or a circuit similar to the USB-DAQ "One-Wire Speed-Up Circuit" is needed to meet the rise time   

As a first step, it would be useful to obtain oscilloscope plots placing the probes right at pin 12 (PRG) and (GNDD) pins of the PGA309 when the issue occurs at cold temperature and when the device is at room temperature to verify the timing. Please also obtain a second zoomed-in plot in the microsecond range, measuring the PRG rise/fall time, on the PGA309 side, when PRG is driven by the controller during the Initialization Byte (55h).

Please also share the details of the 1-wire controller, including the pull-up circuitry and distance on the 1-wire bus.  One possibility is that the rise time is not sharp enough or marginal and the issue manifest itself at the lower temperature ranges; but we would need to verify the timing during the transaction as seen right at the PGA309 PRG pin when the issue occurs in order to debug the issue.

I will contact via direct email.

Thank you and Regards,

Luis