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PGA309: OWD bit makes PGA309 had unexpected problem

Part Number: PGA309

Hello there.

I have a production board that have some problems with EEPROM corruption in some cases. 

I see in the user guide about the OWD bit to disable de PRG pin and it seems to be a good idea for me but when I set OWD bit to 1 the PGA309 gets a fixed output. It's like it stopped working (but I can communicate normally with it). I tried set OWD in the calibration process (with PGA309EVM) and changing the bit on EEPROM Calib File and load it directly in the EEPROM through PGA309EVM software. But the behavior is the same. 

Do someone have a idea about how to set the OWD bit properly?

Regards,

Leonardo

  • Hi Leonardo,

    In stand-alone mode,  right after power up, the PGA309 waits a short delay of about ~33ms and then attempts to read the external EEPROM device. If the PGA309 has been successfully calibrated and the EEPROM has been properly programmed, once the EEPROM contents are verified (TI flag word, checksum1, and checksum 2, are determined to be valid),  the Output Amplifier (VOUT) is enabled.  In PGA309 Stand−Alone mode, if OWD (Register 4 [15]) is set to ’1’ in the first part of EEPROM (configuration part), then the One−Wire interface is disabled and the only way to communicate over the One−Wire interface is to cycle power on the PGA309 and begin communication over the One−Wire interface within 25ms of power on.  Section 3.1 of the PGA309 User Guide p.60 explains the power sequence in stand-alone mode.  

    Per your description, it sounds like you are able to communicate through the One-Wire, but the output is not providing the expected or correct voltage.

    A couple of questions to understand the setup and circuit configuration:

     1.) Can you clarify, is this Custom PGA309 module configured as a three wire module with PRG shorted to Vout? Or is this a four wire module with PRG and VOUT independent connections?  Would it be possible to share the Custom PGA309 board schematic?

    2.) During your initial debug, have you been able to calibrate the PGA309 successfully with OWD = ‘0’ and obtain the expected PGA309 output voltage (if using a four-wire module)?

    3.) Regarding the PGA309EVM-USB setup, can you please provide the following files to ensure we are looking at the same settings: Model file, Pre-Cal File, EEPROM cal file results, and sensor emulator file (if using the sensor emulator).

    Regards,

    Zach

  • Leonardo,

    To begin, I would recommend verifying checksum 1 and 2. Often an engineer will manually modify the EEPROM but forget to update the checksums, resulting in a disabled output. If both checksums are valid, please refer to my other response.

    Regards,

    Zach

  • Hello Zach,

    Thank you for your reply.

    Really I did forget checksum so that's probably why not work modifying manually the EEPROM file. 

    About your questions, is a four wire configuration and VOUT makes input in a XTR chip to make 4-20mA output. I'll send the schematic in your inbox, right?

    Yes, I can successfully calibrate the PGA309 board and it works perfectly in the most of cases. But in some customers, the EEPROM gets corruption after some months of use. 

    I'll send the files of PGA309EVM-USB setup in your inbox too. 

    Regards,

    Leonardo Trinta

  • Leonardo,

    Yes, you may send schematic and files to my inbox directly.

    Please clarify, what was the OWD setting in the production boards that you describe having EEPROM corruption?

    In a four-wire module, leaving the PRG pin enabled can lead to unknown states or even EEPROM corruption due to noise coupling that is interpreted as communication on the PRG line. Disabling the PRG pin by setting OWD bit high is highly recommended in this case.

    However, even with the OWD bit set high, noise coupling during the 33ms power-on time can still cause unwanted communication on the PRG line. For this reason an EMI/RFI filtering circuit is also recommended, as described in section 4.11 of the PGA309 User's Guide. See Figure 4-21.

    Regards,

    Zach

  • Leonardo,

    It seems that you were able to correct this issue by updating the checksum value. Please let me know if you have any more questions, if not I will go ahead and close this thread.

    Thanks,

    Zach

  • Hello Zach, how are you?

    I'm going back to test this solution but I had some difficulty to calculate the checksum. What's the properly method to calculate it? Not is a simple sum apparently. The user guide or datasheet not exemplify it and isn't a CRC too. 

    Regards,

    Leonardo

  • Hi Leonardo,

    I am well, thanks. Glad to see you are making progress on this.

    The correct values in the checksum register are as follows:

    Checksum1 = FFFF – sum(hex equivalent of each location 1/0 through 13/12) truncated above 16 bits.

    Checksum2 = FFFF – sum(hex equivalent of each location 17/16 through 25/24) truncated above 16 bits.

    There is an example of how to compute these values in the PGA309 User's Guide, see Table A-2. Final Values for External EEPROM Example.

    Regards,

    Zach

  • Thank you for reply Zach.

    I messed up with the equation interpretation. I thought "FFFF" said about the format hahahaha. But is FFFF - (minus) sum of hex equivalent. 

    Thank you for your reply. 

    Regards,

    Leonardo Trinta