TL081H: Does the new CMOS H model have the same JFET source impedance distortion issues the old JFET models did?

Hi Ted,

increasing distortion with increasing source impedance in a JFET design comes from input capacitance modulation caused by the changing common mode input voltage. A smaller input capacitance can indeed lower this sort of distortion.

The input capacitance of TL072 is not specified in the datasheet, but is arround 7pF (common mode input capacitance) and 4pF (differential input capacitance):

https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/506012/tl072-input-capacitance

The input capacitance of TL072H, on the other hand, is way smaller: 1pF common mode input capacitance and 2pF differential input capacitance. So, from this point-of-view there should be less distortion increase with source impedance increase.

What speaks a bit against the TL072H in a state-of-the-art audio application is the rather high noise level.

By the way, the distortion caused by input capacitance modulation can be eliminated when running the TL072 as an inverting amplifier, as then the common mode input voltage change would be zero.

Kai

Hi Kai, thanks for the reply.

I'm looking at a low cost buffer design for a high impedance source, so it is the input current noise that is important. I know that there are better op amps than the 072, even the H variant, but it is still very good cost wise. I believe that the current noise of the H version is better than the older versions at least.

I'm not sure if the link I provided came through for you, but maybe take a look at this technical note:

https://www.ti.com/lit/an/slyt595/slyt595.pdf?ts=1648901620887

It describes a new process called Dielectric Isolation (DI) used in the OPA1642 to resolve the capacitance modulation issue. Unfortunately, the OPA1642 is out of stock at TI, and much more expensive than a TL0xxH part at third party vendors.

Other than the technical note I linked above, I can't seem to find any information on what other JFET op amps utilize the DI process or whether other architectures such as CMOS are susceptible to capacitance modulation. Thus, my question regarding the H variant of the TL072.

I am looking at a non-inverting configuration for various reasons, but I was aware that the inverting configuration was better in regards to this issue. Thank you.

Ted

Hi Ted,

this might also interest you:

https://www.diyaudio.com/community/threads/distortion-and-source-impedance-in-jfet-input-op-amps.264797/page-3

https://www.electronicdesign.com/technologies/analog/article/21131760/input-protection-for-lowdistortion-opamp-circuits

Kai

Ted,

In modern CMOS amplifiers, I would think the ESD structure would be the dominate input pin capacitance. The ESD cell is much larger than the input CMOS transistor.  In the archaic TL081, the JFET is quite large and there is no ESD cell. The JFET has inherent ESD level. 

I will test input capacitance vs common mode voltage this week because it would be good to know. 

Hi Ron,

do you know whether the todays TL072 also profit from this DI process? And what about the TL052? We are using thousands of these OPAmp in our products every year.

Kai

Thanks Kai. Those are very informative. It's interesting how hard it is to come by the information regarding common mode distortion even after companies spend time and money coming up with process improvements like DI to alleviate it. I was looking at the TI parametric search page for precision op amps, and it had some notes describing various advanced design techniques including DI, but DI was the only one you couldn't actually use as a parameter.

I did note that John Caldwell mentions that cmos op amps perform well with regards to common voltage measurements and should be considered for high end audio applications. I suspected this, but this is the first time I've seen it stated directly. Unfortunately, he doesn't go into enough detail to help me with my particular question.

Thanks Ron, that will be very helpful. I don't suppose you could directly test distortion vs source impedance in a non-inverting topology also?

Ted

Kai, I don't think the DI process is directly applicable to CMOS transistors, but the oxide layer in the CMOS architecture should play a similar role. However it is possible that the ESD diodes may confound any improvement in high source impedance distortion, as Ron has discussed. Hopefully his measurements will shed some light on this.

Thanks Ron!

Kai