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OPA818: OPA818 noise current increase

Part Number: OPA818

I have a TIA configuration with 50k transimpedance.  I have a noise current source that of some 2pA/rHz that appeared at some point in time.

Can a ESD cause such noise increase while:

1- Rf in circuit still measure 50k (no apparent shunt)

2-Voo (Output Offset Voltage) is still 0.3mV (No obvious input current leakage)

  • Hi Bruno,

    yes, ESD damage can cause increased noise.

    Another cause of unexplainable noise is oscillation due to instability caused by a too high detector capacitance and/or a too small feedback capacitance (phase lead capacitance) and/or a too high capacitive load at the output of OPAmp.

    Can you show a schematic?

    Kai

  • Hi Kai

    With over 40 years of TIA design, I can assure you that stability is not the issue. Months ago, circuit was shown to be stable over -55C to +85C and low noise.  I do lean toward ESD damage with new CM and post-assy houses involved.  Although the input gate doesn't show damage (high impedance, normal Vio, normal supply biases) you believe that damage can be further into the opamp affecting noise and not the input stage, please confirm!

    Regards, Bruno  

  • Hi Bruno,

    when a chip is hit by ESD, this need not necessarily result in total destruction. Even marginal degradation of any parameter can be observed. The spectrum of damage is from 0% to 100%. Everything is possible.

    It can also be that the ESD cells -while protecting the more internal circuitry on die- become damaged (partially or fully) and leave the JFET of input stage undamaged. The increased noise can then come from a damaged ESD cell and not necessarily from the JFET itself.

    Unexplainable increase of input bias current and increase of noise are typical effects of ESD.

    Pre-damage is the worst scenario for the manufacturer of an electronic device. The pre-damaged chip passes the quality control in the factory and fails later at the customer.

    The OPA818 (as many other OPAmps) is only able to withstand a rather limited ESD event. 2.5kV HBM is only sufficient for the handling of chip (assembling, soldering, etc.) but not for the heavy ESD events being observed in a real world environment, where 8kV ESD and more have to be withstood. This is only managable with additional ESD protection measures.

    Kai