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LM311-N: DIFFERENCES IN PINOUTS FROM STANDARD CADENCE ALLEGRO DESIGN AND PSPICE FOR TI

Part Number: LM311-N

Have been using Capture CIS 17.4 for a few months now and have been using components from the Cadence standard library. I've just started using Pspice for TI and I gather looking at other threads that trying to simulate a circuit in PSPICE for TI, created using Capture CIS 17.4 won't work very well as I've found this out. Thats ok, I can re-do the circuit but I've noticed that for instance the LM311-N comparator in Pspice for TI has pin assignments that don't match up with the datasheet unlike the standard Capture CIS 17.4. Can anyone explain this? Is it something to be concerned about? further down the line when I start generating a PCB file?