THS4551: GBW requirement in the TIDA-01351 High-Resolution, High-SNR True Raw Data Conversion Reference Design for Ultrasound CW Doppler

Hello Zhihong,

  Good catch for both of these questions:

1. I believe the author of this reference design rounded up to 2nF since CFILT has to be greater than or equal to 1.2nF. The ADS890x datasheet also chooses a larger value of CFILT (10nF) much greater than 1.2nF. 
   
   
2. Your understanding is correct here on the THS4551 bandwidth calculation. The reference design mentions that ultrasound applications tend to go up to 15MHz. I believe this value was chosen as the RC cut-off due to this design requirement. However, the signals chosen to test the reference design were 2kHz and 20kHz. Higher bandwidth amplifiers are chosen to easily drive higher capacitive loading and these faster amplifiers have faster settling times which is the critical spec. 

Thank you,
Sima 

Hi Zhihong,

I aggree with Sima: "Equation 8" does not say C_FILT = 1.2nF, but C_FILt >=1.2nF.

Kai

Hi Wesley,

here comes a TINA-TI settling time simulation of the circuit:

wesley_ths4551.TSC

Kai

And this is the phase margin:

wesley_ths4551_1.TSC

Kai

Dear Kai,

The phase seems just 19 degree, is that good enough? I found that if I chose the THS4504 whose bandwidth is higher and the phase margin is over 70 degree which is good enough. Should we keep at least 60 PM in this ADC driver application?

Best Regards

Zhihong Huang

Dear Kai,

And also, it seems that the settling error is much larger than the 0.5LSB.

Best Regards

Zhihong Huang