Other Parts Discussed in Thread: OPA2991
In the d/s, there are two plots say the overshoot at certain cap load.
In stability's point of view with system, the phase margin with OPA should be > 45degree. There are two questions here.
1. From Fig23/24, are they able to map to phase-margin value? For example, what's the overshoot is equal to PM=45degree?
2. In the Fig23/24, it says the cap load curve is obtained from 0PF to 1000pF for overshoot. What's the suggestion for the capacitor load value? how to design it to have well stability?
In customer circuit design below, the output cap load is 0.1uF for buffer configuration. Does it have stability issue with 0.1uF cap?