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Hi Team,
Can you help review the schematic and calculation below? Please let me know if anything wrong.
<1k & 10k>
Vhys = 5V * 1k/(1k+10k) = 0.45V
Vutp = 0.45V*2.5V*2.5V = 2.8V (eq (4) in datasheet)
Vltp = 2.8V - 0.45V = 2.35V
PG Implementation using Comparator.TSC
Thanks,
Ella
Hi Ella,
There is a typo in the Equation 4 of the datasheet. It should be "VIN1 = (R1 x VREF/R2) + VREF".
If R1 is 1k and R2 is 10k, then your VHYS is VCC x R1/R2 = 500 mV.
If VREF is 2.5V, then VIN1 is (R1 x VREF/R2) + VREF = 2.75V.
Then VIN2 would be VIN1 - VHYS = 2.25V.
And that is what you get in simulation. Is your target 450mV or 500mV of hysteresis?
Also i noticed that your VREF is a step and starts off at zero. Please keep in mind if both your input and ref starts at zero, in the real device, the output can be indeterminate and have false triggering as the comparator triggers upon itself on the inputs.
Hi Ella,
and I would insert a gate resistance in the kOhm range to isolate the output of comparator from the input capacitance of MOSFET. Otherwise the output of comparator may be short-circuited during the togglings which can cause instability due to internal ground bounce, the develop of ground noise and an increase of supply current. See section 9.1.3 of datasheet.
Kai
Hi Chi and Kai,
Thank you for great suggestion.
Also i noticed that your VREF is a step and starts off at zero. Please keep in mind if both your input and ref starts at zero, in the real device, the output can be indeterminate and have false triggering as the comparator triggers upon itself on the inputs.
I put VREF in a step on purpose. The reason is to make COMPOUT ignore the startup; COMPOUT stays HIGH while VOUTSENSE is ramping up. Can you advise how to implement this?
Sincerely,
Ella
Hi Ella,
Thanks for the follow up. I am going to reach out to you offline to discuss some alternative options that can help you with your application so I will be closing this post.