Hello,
We are investigating using the AMC1302. There is a 1µs to 1.5µs delay between an input step reaching 50% of full scale and the output voltage rising to 10% of full scale.
Is this purely due to the amplifiers in the IC coming out of saturation? Or is some of this delay due to the sigma delta modulation, transmission through the isolation barrier, and retiming?
How much of this delay would we only see in a full scale step response, and how much of it would we see from small signal?
Thank you, Keith
