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TLV9034: Persistent Comparator Chatter

Part Number: TLV9034

Hi,

I am using the TLV9034PWR comparator and am facing great difficulty with eliminating chatter at the output. I have followed the datasheet's recommendation for an inverting comparator with hysteresis in section 8.1.2.1, but have not been able to eliminate chatter entirely when the differential signal approaches zero. The following is a list of characteristics of the system:

- V+ = 5V and V- = 0V

- I am using only one of the four available comparators. The unused inputs and outputs are treated as per the datasheet's recommendations.

- The noninverting terminal is a constant reference voltage to be calibrated as needed. I need the reference to be able to be as close to 5V as possible.

- The inverting terminal is the input signal.

- I have implemented the inverting comparator with 80mV hysteresis. Since I am only concerned about the output switching from low to high, when the input switches from above to below the reference, I chose my desired switching voltage to be the lower trip voltage on the hysteresis transfer curve instead of the center of the rectangle (see figure 8-2).

- After initializing the input to 5V, the reference updated to 4.75V and the output to 0V. When setting the input to a few mV above the reference and bringing it down to the reference, the output looks like a square wave with 50% duty cycle and ringing at all transitions. It is my understanding and intention that the output should still be exactly 0V until the reference voltage is crossed at which point it jumps to 5V exactly. I believe that what I am seeing is chatter, despite my addition of hysteresis.

- I cannot afford to filter the comparator I/O pins as this would cost speed in a safety-critical application. Additionally, I need to keep the reference voltage (noninverting terminal input) as high as 4.9V in order to guarantee the fastest speed. Similarly, I would prefer to decrease the amount of hysteresis.

What could I do to eliminate the chatter completely? The comparator output is driving an NMOS and a separate gate driver, but chatter is present whether or not it is loaded.

  • Please show the schematic.

  • Thanks for your post. Please include information about your 5v reference and how it’s generated with the schematic Clemens has requested. 
    Chuck

  • Hi, the following is the schematic:

    VDD is a 5V reference generated by a power supply.

    This schematic shows an unloaded output. I would like to make sure that the unloaded comparator works perfectly before I load it.

    The comparator switching reference and hysteresis properties are determined by the potentiometers R3 and R4 at the noninverting terminal and R5. This reference can be assumed to be constant for all time once it is set initially by hand.

    The system's input signal is determined by R1 and the potentiometer R2, which can vary from 0 to 50 Megohms. R2 is made up of four series-connected 10 Megohm resistors and five series-connected 2 Megohm potentiometers; each element can be shorted by flipping a slide switch to effectively create a single 50 Megohm potentiometer.

    All potentiometers used offer variable resistances by turning a screw mechanism. 

    The comparator's function in this case is to drive transistors based on R2 decreasing its resistance down to and past a specific value to be determined. When the output needs to be reset to 0V, another slide switch is used to remove R2 entirely from the circuit to provide 5V to the inverting input.

    In the example provided in the original post, 80mV hysteresis would be provided by R3=16.8kohm and R4=506.024kohm so that the trip voltages are 4.84V and 4.76V. This would mean that when the output of this inverting comparator is low, reducing the resistance of R2 to less than 20Megohm should cause the output to switch high. By design the intended switching resistance at R2 corresponds to the lower switching voltage of the hysteresis transfer curve.

  • John

    Thanks for the additional information.  You are mentioning some very large potentiometer values which has me a bit concerned plus it almost sounds like you may be just breadboarding or hand wiring your circuit.  if so, that can be problematic for trying to run your evaluation.  The output transitions for this device are quite fast and can cause glitching themselves if proper layout techniques are not followed.  Maybe it would help if you trying adding a bypass capacitor at the inverting input where these large pots are being utilized.  Sorry, it is really hard to help solve the problem you are experiencing.  Conceptually you are doing everything correctly, but I fear that the construction of your circuit could the source of your problem.

    Chuck