Hi team,
What is the range of pull-up resistance value on SDA and SCL during high-speed mode I2C (up to 2.94 MHz)? What is the driving capability of SDA and SCL in mA?
Best regards
Hayashi
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Hi team,
Hello Hideki,
The device is specified with a max (worst-case) low logic-level of 0.4V when sinking 3mA. So choose a pull-up resistor that would yield a pull-down current less than this for margin.
In general, 4.7kΩ pull-ups to 3.3V supply on the EVM have shown working I2C high speed mode operation.