OPA2192: OPA2192 internal diodes and ESD detail

Hi Eddie, 

Could you post a larger and higher resolution image above? I want to see these fine print in the image. 

There is no back to back diodes at the input of OPA2192, and the minimum signal supply rail is 4.5Vdc. If the part is running at 4Vdc, the part is not operating in a linear region. 

I will take a closer look at this in the morning. 

Best,

Raymond

Hi Expert,

The clear pic as below;

Please help to comment why VSLI is 4v input but PIN 5 only see 2.4V ?

Where it go through and disappear 1.6V as this circuit and setting as I last E2E post.

Hi Chao Fu,

You did not describe everything in the circuit. The voltage at Vp is likely 0.8V in the testing condition, where U2, OPA192 is an op amp summing circuit. 

Please see if my interpretation is correct. Enclosed is the simulation circuit. 

OPA192 E2E Issues 12212023.TSC

Please close this inquiry, if I answered your question. Otherwise, please describe the voltage nodes at different test points. 

Best,

Raymond

Hi Expert,

My customer want to know why they cut down the Vcc 18v  and V33DS signal input.

Only VLSI 4V input signal , but his pin5 will see 2.4v not 4V on pin5.

Do we have any comment or my customer have wrong connect ?

Eddie

Hi Eddie, 

Chao Fu Chen said:

Do we have any comment or my customer have wrong connect ?

The circuit is correct. If you simplify all these input connection in the above circuit, this is what you have. This is non-inverting op amp summing circuit. The mosfet pairs are simply a switch.  

If you do not understand how the above circuit works, please let me know. What is your intended circuit operation or what is the design requirements. 

Best,

Raymond