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Practically measuring open loop gain and phase

Hello,

I am in the swing of developing a practical circuit that will measure open loop gain and phase of an amplifier.  I have used two circuits on the bench:

(1) Using a non-inverting amplifier where the gain element is a capacitor (Cg) and a feedback resistor.  Values are typically 0.1uF and 100k.

The problem with this circuit is that the cutoff frequency is relatively high so low frequency data is junk.

(2) Using  a false summing junction circuit.  

The problem I have seen with this circuit is a flattening out at high frequency and depending on the amplifier there is no zero crossing.  The slope changes if I change the voltage divider ratio at the false summing junction and the inverting input.

I rather use the false summing junction circuit since it can preserve low frequency data, but I am beduffled on how to ensure a 20dB slope over frequency.  I believe the issue is the output resistance of the amplifier interacting with the feedback network.  In fact, I put together a very simple spice model of an op-amp using several VCVS to model the GBWP, dominant pole, and output resistance.  If I set the output resistance to 0 ohms then I get a perfect 20dB/dc slope.

I guess I could add another amplifier as a servo amp to decouple the DUT's output resistance from the feedback network, but what to do with the output resistance of the servo amp?  It seems that I simply "moved" the problem.

The goal is fine tune circuits for stability measurements in my circuit designs.  Since they are not mass production I have the luxury to do so.

 

-Ken

  • Ken,

    Among the most reliable ways to measure open-loop gain and phase of an op amp is in an inverting amplifier configuration. You can directly measure the output voltage and input voltage directly on the inverting input of the op amp. The approach avoids any mystery about what might be happening between the real summing junction and a false summing junction. You are directly measuring input and output of the op amp. All the interesting behavior happens in the last decade prior to the gain crossing, so signal amplitude on the input is big enough that you can make accurate measurements.

    It's rare that anything unusual is happening at frequencies lower than that last critical decade. We, of course, know from simulation of the design where to expect to find interesting things happening so this helps.

    When we provide gain/phase graphs, the low frequency behavior (the first pole at very low frequency) is not determined with AC measurements. The signal amplitudes are simply too small to "see" this pole.  We make large scale DC measurements of open loop gain and flatten the gain/phase graph out at this value. The location of this pole may vary significantly from device to device as the very high effective resistance at gain nodes in the op amp can vary significantly. This variation in the pole frequency does not affect the GBW of the op amp because this is determined by current levels and capacitance that are more tightly controlled. The location of this first pole has no real significance in stability of circuits.

    Regards, Bruce.