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OPA462: Output linearity and supply issues

Part Number: OPA462
Other Parts Discussed in Thread: DRV2700

Hi, 

I am using OPA462 to drive a high voltage piezo load about 2uF. The supply voltage is set initally 0(V-) and 150V(V+). And after tested on demo a board, I have met a few issues.

1. The input-output curve below is not linear from 0V-0.1V input.

2. I tried to replace the negative supply with -12V generated from a DC supply, but found the "V-" pin was somehow shorted to GND. Tried to leave E/D Com floating but that didn't help. Please help review the connections.

  • Hi Cain,

    The issue is related to the OPA462 PowerPAD connected to GND...

    The PowerPAD is internally connected to V–. The PowerPAD must be soldered to a printed-circuit board (PCB) and connected to V–, even with applications that have low power dissipation.  Hence, you will need to modify the design to connect both the V- pin and the PowerPad to the most negative supply.

     See OPA462 PowerPAD information below.

    Thank you and Regards,

    Luis

  • Hi Luis,

    Thank you for the explanation. I have another question about the power consumption of OPA462. I tried to change the power supply of OPA462 to TI DRV2700 in flyback mode (HV set to constant 150V), and found the HV gradually dropped to about 130V as OPA462 output increase from 0 to 100V (DC output). After OPA462 output is larger than 130V, the supply voltage will increase to several volts above the output. I wonder if the drive strength of DRV2700 could satisfy the requirement of OPA462 under this use case (DC output to drive a capacitive load)?   

    Kind regards,

    Cain

  • HI Yen,

    The OPA462 quiescent current consumption (unloaded) is 3.7mA maximum. The total consumption of the op-amp will of course change depending on the output load and DC output voltage.  If this is only a purely capacitive load with a voltage DC signal, and assuming the op-amp is stable and properly compensated to drive the capacitive load, the current consumption will be the in essence quiescent current consumption of the op-amp plus any leakage into the load capacitor.

    Operational amplifiers are sensitive and can become unstable while driving capacitive loads directly. In general you would use an isolation resistor between the op-amp and the capacitive load, or use other compensation scheme. What is the value of this load capacitance?  It is possible that the amplifier is unstable or marginal, and this is creating issues with the current consumption, 

    Please review Figure 38 of the OPA462 datasheet "Small-Signal Overshoot vs Capacitive Load" using different Riso resistors values at the op-amp output.  A conservative guideline for a robust design is to allow ~>43 -degrees of phase margin, which corresponds to <25% overshoot, which is very stable...  On a circuit that shows 55% - 60% overshoot, you have a very low phase margin at 18-degrees of phase margin, where you design is not robust and may become unstable/oscillate /present excessive ringing.  For example, capacitiveloads above >100pF, without an isolation resistor, will likely start creating issues,

    You can also perform a stability analysis using TINA TI Spice Simulator.

    Below are some resources so you can look into stability analysis.  If you require assistance with stability analysis, please let me know the load capacitance range and provide the details of your load.

    Thank you,

    Luis Chioye

    For more detailed information on the procedure for this stability analysis, please review the below TI  video for tutorials.  Stability analysis is quite an extensive topic to discuss in a single forum post, and there are several methods to analyze stability.

    Please review the link below into TI Precision Lab series on op-amp stability, 9 videos:

    TI Precision Labs, Op-Amps

    To navigate to the sessions for op-amp stability, go into "topics" and Look into Stability- (9-relatively short videos)