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INA226: SMBus Alert Response address Behavior

DTB
Prodigy 60 points
Part Number: INA226
Other Parts Discussed in Thread: INA233

Hi TI Team,

For one of our design created in 2016, we used the INA226 to monitor current and we also used the Alert function to trigger on over-current (latch mode).

Back then, we needed to check if the Alert triggered without clearing it, so we polled the SMBus Alert Response address (0x0C) instead of reading the 0x06 register (which would have immediately cleared the alert). Everything was working as expected.

In 2023, we changed the MCU, bought a new batch of INA226 and the behavior seems different.

Basically, when a broadcast is sent on 0x0C, the INA226 still answers (if an alert is latched), but now it also clear it.

What's the expected behavior (I can't find anything related in the datasheet)?

Does polling the SMBus Alert Response address after an alert has occurred is supposed to clear it or not?

If that's the expected behavior, is there any way to check if an alert has been latched without clearing it immediately?

Thank you!

  • 0
    TI__Expert 6602 points

    Hi,

    I am looking into this and will get back to you by Wednesday. 

    Best,

    Mohamed 

  • 0 in reply to Mohamed Hamida
    TI__Expert 6602 points

    Hi,

    Here is a snip from the datasheet that describes the SMBus Alert Response:

    So, after the SMBus Alert call, if the INA226 responds first then the Alert will be cleared. If the INA226 does not respond first, then the alert will not be cleared and you will need to read from the INA226 directly to clear the alert.

    If you need an alternate way to monitor the INA226 alert without clearing the alert, then you can use the hardware alert pin. As long as you don't need the conversion ready flag on the alert pin, then you can know when the device alert had triggered from the hardware pin without reading the device register. For this to work, you would need to individually monitor the alert pin from the INA226.

    Best,

    Mohamed 

  • 0 in reply to Mohamed Hamida
    Prodigy 60 points

    Hi,

    The specified line in yellow explains what happen if the device lose the bus arbitration (ie: no alert clearing), but don't tell what happen if it wins (the previous line tells that it will "acknowledge the Alert response and send its address on the bus" without any note on clearing the alert).

    I still don't understand why the behavior on a different batch is different. Please don't close this thread immediately, i will hook up a logic analyzer and grab some frames.

    Unfortunately, checking the alert line is not a solution for us as there is 3 different devices that can drive this signal low. We need to do it in software. Maybe replacing the INA226 by pin-compatible INA233 could be a solution?

  • 0 in reply to DTB
    TI__Expert 6602 points

    Hi, 

    The expected behavior of the SMBus alert response address is that the alert pin will remain active until the device successfully responds to the broadcast. This would imply that polling the alert response will clear it automatically. I'm not sure how the INA233 would be any better in this aspect. Are all 3 devices clearing the alert, or just the first one? 

    Best,

    Mohamed