During initialization, when the INA205 cmp1 reset pin is pulled high and cmp1 in has no input, cmp1 out outputs a high level
Can you see what the reason is, please
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During initialization, when the INA205 cmp1 reset pin is pulled high and cmp1 in has no input, cmp1 out outputs a high level
Can you see what the reason is, please
Hello Appreciated Engineer,
What is the input common-mode voltage (Vcm) at the shunt resistor?
The most likely reason is that during the power up initialization, the 0.6V reference voltage is slow to ramp and/or there is a small, but fast output glitch at OUT. This creates a momentary Vout > Vthresh condition which trips the comparator.
One way to confirm this is to probe CMP_IN+ and CMP_IN- (with respect to INA205 GND pin) during power up. You could also try removing C121 and C122 to see if this helps speed up 0.6V ramp time.
Sincerely,
Peter