This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV1805: We have a circuit that applies 12Vdc to the SD pin (pin 5)

Part Number: TLV1805

Unfortunately we have a released design that applies 12Vdc to the SD pin (pin 5) of the TLV1805.  The voltage is applies through a 1Megohm resistor.  This illegal condition is sometimes applied when there is no Vdd on that part (pin 6 = 0V and sometimes with Vdd = 12V.

Will this damage the device?

Thank you,

Anthony D'Andrea

  • Hi Anthony,

    Hmmm...Well, we cannot say it will not cause damage,as this is applying a stress well beyond the datasheet limits for the SD input.

    While is is a 40V comparator, the shutdown pin is actually comprised of low voltage devices, and thus has the 5V maximum limit.

    I believe the SD input contains a snap-back type ESD clamp, so it is only clamped to GND. So there is no "upper" ESD clamp to the supply, so the SD input pin an be pulled-up beyond the 5V.

    Unfortunately, this does allow the input to be pulled-up to 12V..and that is not good for a 5V device structure.

    So we cannot say that it is "OK" as you are stressing the SD input devices. You are into device breakdown territory at around 12V. At some point, the SD input could break-down - and that would not be good.

    The 1M resistor will limit any current to ~12uA, so that is good. But the problem is that if the device does break-down and latch, then other conduction paths could open-up internally and snowball from there.

    So sorry I do not have any good news. The only "fix" is to either clamp or attenuate the voltage on the SD input.