I have designed a differential wideband transimpedance amplifier for a high speed DAC (DAC5681). This DAC has an output compliance range of AVDD+-0.5 V. I have chosen a transimpedance architecture as circuit has to operate from DC to 300 MHz. See schematic in attached ZIP file.
The problem is that this circuit oscillates wildly at about 2 GHz.
Let me explain the design decissions and some measurements I have taken.
The transimpedance stage is simmilar to this described in SBAA150 application note, Example 3.
The PCB was carefully layed out. It is a 8-layer one, and I have removed the ground plane under bias resistors (R22 and R23), feedback elements (R21, R27, C47, C49) and amplifier input and output, including output resistors (R25 and R26). The ground plane removal is valid except for the more distant layer (L7) to shorten current return path. See gerber files detail in attached file.
After many tests involving 4 boards and many experiments, I decided to hand assemble the offending components in a new PCB, and I found simmilar vehaviour, thus DAC can be considered out of the oscillation equation. Even more, in my previous experiments I found that the output common mode setting to mid supply is not responsible of oscillation, so the circuit around it is not assembled. Just R22, R23, C47, R21, U5, R27, C49, R25, R26 and all decoupling components (FB7, C45, C46, FB8, C43, C44) are assembled.
With the component values show, the oscillating frequency is 1.38 GHz and -8 dBm (over 50 R, AC coupled to spectrum analyzer). Gain is 2.3 (7 dB), too close to minimum.
The I reduced R22 and R23 to 11R, increasing gain to 4.5, a safest figure. Oscillation frequency ¡rises! to 1.82 GHz and -13 dBm.
Following some advices in SBAA150 application note, I solder 10 pF in parallel to the amplifier input (in differential mode). Oscillation goes up to 2.25 GHz and -16 dBm.
The I used 100 R for feedback resistors R21 and R27. Oscillation remains at 2.25 GHz and -16 dBm. No changes.
Then , I tested the circuit shown in Figure 21 of SBAA150, using an 130 R in parallel to 12 pF and feedback of 100R and 3p5. Oscillation frequency is 1.9 GHz and -13 dBm.
Oscillation has been measured in 4 series boards (with DAC) and the new one with just the offending circuits.
I have also tested with more decoupling, higher frequency decoupling (like 100nF uW grade capacitors), output traces isolation: using local load termination and attenuation for coaxial cable used for measurement. I have cut traces in DAC input and feedback components, soldering them capacitor over resistor. Nothing works: the circuit is addict to oscillation. I have been able to see oscillation frequency variations depending on the load placed in the non measurement port (either, open, 50R load to GND or AC coupled 50R to GND) but this does not surprises me much as the output stage biasing conditions the nonlinear behavious that sets the oscillation level.
It seems to me that the problem is the second pole of the amplifier (not a very clever guessing). I have done some TINA simulations and my own analysis using douple pole models and, despite minor instability with original designs, all other should be perfectly stable. This means probably the problem is due to component/board paratistics. The GBWP of the device is 3 GHz, so at 2 GHz the device has very small gain, and positive feedback has to be very strong. How can the output phase shift so much?
If you have any clue, please, tell me.
Best regards
Luis Miguel
