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Tool/software:
Hello,
I recently came across an informative post on EDN discussing how to test operational amplifier characteristics. However, I've encountered difficulties when attempting to test comparators in a closed-loop configuration, as the output tends to oscillate, unlike operational amplifiers.
EDN Op Amp Testing Basics Link: EDN Op Amp Testing Basics
Actual test results on PCB
I understand that testing comparators requires different techniques due to this oscillation issue. Specifically, I am looking to accurately measure the following characteristics:
Could anyone provide insights or methodologies commonly used to test these parameters for comparators? Any specific test setups, best practices, or references to relevant documentation would be greatly appreciated.
Thank you for your assistance.
Best regards,
Thanks for your post. We are on holiday break and will review your post when we return on Tuesday. Sorry for the delay.
Chuck
Hello,
You cannot measure a comparator and an op-amp on the same system. They are NOT the same.
A comparator has a digital (non- linear) output, and is similar to an un-compensated op-amp.
The digital output needs to be converted to an equivalent linear output - so this involves integration.
There are two ways to measure comparator offset:
For #1, the input is ramped positive and negative - and the points where the output switches is noted. Usually 10:1 or 100:1 resistor dividers are used to scale down the output of the function generator. There are NO bench signal generators capable of accurate, repeatable mV resolution - better to divide down.
There will be a "positive" trip point, and a "negative" trip point. From these two points, you get both offset and hysteresis.
The "average" of the positive and negative trip points is the offset. Vos = (Vpos+Vneg)/2
The peak-to-peak difference between the positive and negative trip point is the hysteresis. (Vhyst = Vpos-Vneg)
For #2, see the TLC393 datasheet, page 8:
If you have all the time in the world, you can make accurate measurements. This circuit replicates the op-amp test loop, but the comparator digital output is converted to analog by the integrator. The slower the ramp speed, the better the accuracy due to the diminishing effects of prop delay and output symmetry. However, the #2 circuit assumes no internal hysteresis.
For more information on comparators, please see:
https://www.ti.com/video/series/precision-labs/ti-precision-labs-comparators.html
PSRR would be measuring the offset at two different supply voltages.
PSRR = 20*log(Vos1-Vos2)
Ibias would be measured the same as the op-amp. Since this is a CMOS input, the bias current would follow the classic 2x every 10°C, just like an op-amp.
See:
Hello, Paul,
Thank you so much for your comprehensive and insightful response. I greatly appreciate the time and effort you took to provide such detailed explanations and references.
I have always found the expertise shared on the TI forums to be exceptional, and this response has certainly reinforced my high regard for the knowledge and support provided here. Your guidance will significantly enhance the accuracy of my testing methodologies.
Thank you once again for your invaluable assistance.
Best regards,
[C cc]