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INA331: INA331

Part Number: INA331
Other Parts Discussed in Thread: OPA336, INA351, LM7705, OPA333

Tool/software:

For instrumentation amplifier, INA331, this is being used as differential amplifier with R1 = 100K digipot and R2 = 100K. From DS, this indicates that VREF requires to be driven with low impedance input. To acheive low impedance for VREF, this has been implemented as follows:

Digipot, L connected to 0V.

Digipot, W connected to input of buffer, OPA336, with output connected to VREF

Digipot, W connected to RG input on INA331 along with one side of R2, 100K. Other side of R2 connected to Vout.

Please advise if above configuration outlined allows:

Varition of Gain as digipot is used as variable resistor in expression, G = 5 + (5R2/R1)

VREF is driven from low impedance, OPA336

If you are able to provide an update ASAP please ?

Thanks

  • Yes, R1 can by a digipot. And driving the reference input with an opamp is commonly done. (The are devices like the INA351 that integrate such a buffer.)

  • Hello, 

    I agree with Clemens. Let us know if you have any further questions. 

    Best Regards, 

    Chris Featherstone

  • Thank you for the update.

    My question related tp how the digipot for R1 was connfigured with it's connections for H, W, L and using buffer outlined as outlined earlier and summarised below. Please confirm if this arrangement is acceptable ?

  • Hi Naeem, 

    Can you provide your simulation or schematic for us to verify in TINA Ti?

    Best Regards, 

    Chris Featherstone

  • Hi Chris,

    Not sure I can provide segment of schematic as this would require NDA to be in place. I have out

  • Hi Chris,

    Not sure I can provide segment of schematic as this would require an NDA to be in place. However, the connectivity is outlined below and differential inputs to INA331 omitted.

    Digipot, 100K, H pin to RG/R2 pin of INA331

    Digipot, 100K, W pin to input of OPA336 used as buffer. Output from OPA336 connected to INA331 VREF pin.

    Digipot, 100K, L pin to 0V.

    R2 = 100K

    From above, VREF is driven from low impedance source of output of OPA336 and INA331 used with differential inputs for variable gain

    If you can please advise if above configuration would support gain, G = 5 + 5(R2/R1), this would be very helpful or advise if any changes are required ?

  • Hi Naeem, 

    This is challenging without a schematic or simulation. The digipot is also not our device so I will need to take a look at how this is configured based on your description. 

    I will attempt to simulate the circuit based on your description. 

    Regards, 

    Chris Featherstone

  • Hi Naeem, 

    I simulated based on the description above and the circuit does not work. Please download Tina in the link below and modify the circuit to your description or verify the schematic below is correct. I have provided my simulation below that can be modified and re-attached. 

    Tina Download:

    https://www.ti.com/tool/TINA-TI

    2021.INA331.TSC

    Best Regards, 

    Chris Featherstone

  • Hello Chris,

    For download of TINA from link provided, I will require to obtain access from IT, which may take a few days.

    From your circuit provided, INA331 is referenced to +3V3 and 0V. Shutdown pin is enabled seperately and see you have this enabled by external power supply.

    In summary, if a variable resistor (digipot) is used in place of R1, what is the way forward in interfacing with INA331 which meets with VREF being driven from low impedance source ? In my case,  I was using the output from wiper of digipot as input to OPA336 and its output as VREF which you have indicated will not work ?

  • Hi Naeem, 

    With the circuit as described and assuming my schematic is correct the circuit does not work. Therefore I need confirmation on the schematic and if it needs to be adjusted. 

    Best Regards, 

    Chris Featherstone

  • Hello Chris,

    Thanks for the reply.

    Looking at ealier questions submitted on this forum relating with INA331, my understanding is that for single supply rail, +3V3 in my case, the circuit which you provided in your simulations will require to be revised which will both meet with VREF of low impedance and output offset of +50mV.

    1) Resistor, R1 digipot, 100K connects between VREF and RG pins.

    2) VREF connected to 0V

    3) -ve supply rail requires LM7705 which addresses output offset of +50mV

    4) Differential inputs in your simulation circuit connect with signal generator 

    With above changes in place, would the revised circuit now work which meet with VREF of low impedance ?

    Thanks


  • Working2_2021.INA331.TSC

    Hello Chris,

    I have managed to simulate the circuit with input of 13mV providing output of 1V where R1 = 6K9, R2 = 100K with G = 77 as example to illustrate the amplifier is working correctly. This required common of R1 and VREF to be connected to 0V. Also, I used dc supply of -0.232V connected to V- supply to remove the 50mV dc offset. I did try to use potentiomter for R1 with resistance set 100K and 6.9% scaling, but this did not provide the required 6K9 value required - not sure why this was, if you can check this and provide your feedback please ?

    In summary, from simulation circuit attached, apart from digipot not working as required, the amplifier provides the required output on one example outlined. Please can you advise if configuration of amplifier is as required and advise what changes would be required to make digipot work as required ?

  • Hi Naeem, 

    In your simulation there are a few problems. The DC output is railed out to 1.68mV and the signal is clipping. For this reason I have a suggested circuit that I built in the second image below. 

    I believe you are attempting to get variable gain using a potentiometer. I have connected a potentiometer as shown below that provides variable gain and also adheres to the gain equation in the product datasheet. The reference pin is driven with a low output impedance via an op amp. The op amp driving the reference pin is the most common way to drive the reference pin. I also utilized a voltage divider to provide a mid supply common mode voltage and I also used this mid supply to drive the reference voltage. Not that the mid supply is 1.65V and the output is now sitting at a DC voltage of 1.65V. This allows the signal to be centered around mid supply. 

    The potentiometer setting is set to 10% or 10kohm. R2 = 90k. This provides a gain of 50 V/V or approximately 34 dB. 

    The transient analysis also performs as expected as seen below. 

    I have also entered the conditions into the calculator to show the min and max input and output signals. The calculator link is shown below. The INA331 can be selected under the Vcm vs Vout calculator.

    https://www.ti.com/tool/ANALOG-ENGINEER-CALC

    Here is my simulation file:

    INA331 (1).TSC

    I hope this helps. 

    Best Regards, 

    Chris Featherstone

  • Hello Chris,

    Thanks for the information. I simulated your circuit, for 9mV differential input, I was expecting to see 2.1V at output and did not. The circuit which I have been provided with is attached. This has VCM of 1.65V set by P1 digipot, whilst P2 digipot is R1 for INA331 and connected to VREF. Differential input is from resistive bridge where the difference is 0.26uV (absolute min) to 65mV (abolute max). Output from INA331 requires to be in range of 0 to 3V. Can you advise what changes would be required to the circuit to comply with INA331 please ?Set-Up.TSC

  • Hi Naeem, 

    With a 9mV input the output provides approximately 2.1V on the output as expected. The gain is 50V/V in this configuration. Please see below. 

    In your circuit I do not recommend driving the reference pin with anything other than a low output impedance amplifier. I am not able to understand why a potentiometer is being used to drive the ref pin. Do you want to vary the reference voltage? If so the potentiometer could be used in a voltage divider configuration as an input to the amplifier driving the reference pin. 

    Best Regards, 

    Chris Featherstone

  • Hi Naeem, 

    I misread the datasheet initially and I now see that R1 is supposed to be connected to the REF pin. I modified my simulation to follow this. The gain is simulating as expected and follows the gain equation in the datasheet. 

    INA331 (1) (2).TSC

    I have also modified it to connect the bridge on the input as shown below. The common mode voltage is 1.61V as shown below. The gain is simulating as expected and follows the gain equation in the datasheet. 

    INA331 Bridge.TSC

    Best Regards, 

    Chris Featherstone

  • Hello Chris,

    Thanks for the update. For the bridge circuit, I had initially taken the feedback from R1, input to OPA236 buffer whose output then connected with VREF. I note in your update, output of R1 is also presented as input to OPA236 with 1.65V common mode voltage to +ve input making this a difference amplifier which ensures output voltage remains at 1.65V when differential is 0V, which is fine. In summary, the common mode input voltage has been moved from one side of 10K input resistor (VF2 in simulation setup) to +ve input of OPA236.

    Question: Does the -ve supply terminal pin of INA331 require to be connected to output of LM7705 which removes the 50mV offset or can this remain connected to 0V ?

  • Additional question:

    Can I use OPA336 in place of OPA333 which you had selected for driving VREF pin ?

  • Hi Naeem, 

    We have a section on offset trimming which demonstrates using a reference voltage at the reference pin. This is the only method of offset voltage trimming that I am aware of for the device. Please see the snippet below from Page 11 in the product datasheet section discussing offset trimming. 

    The LM7705 is used as a negative bias generator on the VEE line for single supply application that have signals that go below ground. The input and output linear operating range is relative to the supply voltage. If your on a single sided supply and VEE is at ground then input and output signals cannot go below the VEE supply which in this example is ground. Therefore a negative bias generator such as the LM7705 could be used to bias VEE to a negative value and therefore allow for a little more headroom for signal swing below ground. To avoid using the LM7705 in my simulation I DC bias my signals around mid-supply and this allowed me to have positive and negative signal swing centered around a mid point within the supply rails. 

    To help guide your decision the analog engineers calculator will help guide you on the allowable linear conditions of operation. 

    Let me know if I can be of further assistance. 

    I switched the OPA336 to the OPA333 because I saw 4 dB of gain peaking using the OPA336 which indicated the circuit would be unstable. I did not see this level of gain peaking using the OPA333. 

    Best Regards, 

    Chris Featherstone

  • Hello Chris,

    Thanks for the update. I tried to find OPA336 in amplifier library and was not able to locate this. 

  • Hello Chris,

    Thanks for your help provided.

    Regards,

    Naeem

  • Hi Naeem, 

    No problem. Best of luck with your project. 

    Best Regards, 

    Chris Featherstone