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Original question:

TLV9161: PSPICE Model

TLV9161: output unstable if the intput is less than 100 mv, rail to rail operation

Arun Kumar
Expert 1030 points
Part Number: TLV9161
Other Parts Discussed in Thread: TLV9162, TINA-TI

Tool/software:

Hello experts,

We are trying to smulate the TLV9162 model given in https://www.ti.com/product/TLV9162 , usder "Design Tools & Simulation"

We tried a simple voltage follower with a non inverting input , giving it a sinosoidal input of 5 KHz grequency , with an offset of 1v and amplitude of 1v in single supply configurtion with V+ of 3.33v.

Notice that as the input approches near 0v(less than approx 100 mv) , the output gets unstable..

Could you kindly conform if we are violating the opamp parameters in some way.?

We tried the same curcuit with a supply of 15v with similar results

  • 0
    TI__Mastermind 33151 points

    Hey AK,

    This is not the intended behavior. I believe there is an internal clamping structure that is causing this behavior. We will work to resolve this. In the meantime, I would try to keep the output voltage away from the linear range of the output stage. I believe in this model the worst typical spec was targeted, which was 85mV from V-.

    As another point, we do not support LTspice, and this model works somewhat better in TINA-TI (see below) where this behavior is only seen on the first instance of going outside of the linear output range.

    Best,
    Jerry