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OPA828: TINA-TI unrealistic stable simulation

Axel Bregnsbo
Prodigy 20 points
Part Number: OPA828
Other Parts Discussed in Thread: TINA-TI

Tool/software:

I have built the circuitry shown below, which is a 1 MHz amplifier capable of driving at 150 ohm load with up to +20 V. When loaded with too high capacitance (a 2 m RG58 coax), modelled with Cload, it starts to oscillate at 12 MHz. When I simulate the circuit in TINA-TI I am not able to reproduce the actual oscillating behavior.

The TINA-TI simulation does not oscillate even if I grossly exagerate component values, which should make the circuit unstable. I therefore suspect there is something wrong with my usage of TINA-TI.

More details:

As I understand to get stable circuit the feed-back pole consisting of R7||R10 * (Cstab+ C_opamp_neg_input) should be = 100 MHz > 2 * GBW / gain = 45 MHz / 5.3 = 8.5 MHz, thus amply fullfilled. Changing Cstab to 100 nF however does not make the circuit unstable. Increasing Cload dramatically also does not make it unstable. Only by using R7 = 1 Mohm & R10 = 4.7 Mohm was I able to get an oscillating output.

Am I doing something wrong with TINA-TI ? Is there an obvious parasitic component that I miss to add (long inductive wires to Q1) ?

The TINA-TI component references match the reference designators in the pcb picture.

h_card.TSC

  • 0
    TI__Intellectual 2670 points

    Hello Axel,

    To fully address this question, we're going to need some time. We will have a response for you within 3 business days.

    Best Regards,

    Alex Curtis

  • 0 in reply to Alex Curtis
    TI__Guru* 77521 points

    Hello Axel,

    The issue is the capacitive load at the output. 

    If you add the current probe at the output and perform small signal step transient analysis, you see that the output current is oscillating (this is the V-to-I conversion circuit).  

    If you sweep the AC frequency, you will see the gain peaking in the output current. 

    6708.h_card Stable 08092024.TSC

    I inserted Cf = 470pF compensation capacitor, it looks stable now. We can run the AC stability loop analysis on Monday, if you are interested. 

    Best,

    Raymond 

  • 0 in reply to Raymond Zhang1
    Prodigy 20 points

    Hi Raymond, first of all thanks for taking time to answer my question. I appreciate your feedback.

    Your have shown that output current has a small oscillattion, which is suppressed by the Cload output capacitance. However, that is not what I see in lab. In lab with VG1 = 3.0 V DC, I see VM1 oscillating constantly at 11.6 MHz with 3.4 Vpp, i.e. indicating a much higher current oscillation than what the TINA-TI simulation shows. The oscillation is pretty robust, as long a Cload > 50 pF (going from 0.3 m RG58 to 2 m RG58).

    I think the problem is that my TINA-TI model of the MJD44H11 power transistor is wrong, the real transistor being much slower than the Spice model. In the table below I have listed the phase delay I measured in the laboratory, and compared with TINA-TI simulation. The phase delay through the emitter follower is unusual high, and does not match TINA-TI. The opamp difference I explain as the model being more pessimistic with GBW compared to the real opamp.

    Comments ?

    path

    lab measured

    TINA-TI, *1

    Vopamp_in -> Vopamp_out

    70.0 ns / 290 deg

    82 ns

    Vopamp_out -> Vout

    18.4 ns / 76 deg

    3.0 ns

    Vout -> Vopamp_in

    2.8 ns / 12 deg

    3.6 ns

    sum

    91.2 ns / 378 deg

    oscillation period

    86,8 ns / 360 deg

    Note 1: VG1 = 3VDC + 0.1 mVp 11.6 MHz

  • +1 in reply to Raymond Zhang1
    Prodigy 20 points

    Hi Raymond,

    BREAKING NEWS.

    I was able to get TINA-TI simulation to oscillate. Oscillation is dependent on the VG1 DC value. Increasing VG1 to 2 V, and increasing Cload to 500 pF made it oscillate at 10 MHz with 3 Vpp, similar to what I see in lab.

    My measurement of phase delay in my previous comment is likely wrong or highly inacurate: I used the peak of the waveforms to measure the delay, which I now think can be a bad measure of the phase of the fundamental.

  • 0 in reply to Axel Bregnsbo
    TI__Intellectual 2670 points

    Hi Axel,

    Just to clarify, are you just trying to replicate the oscillations you're seeing in hardware in TINA? Or compensate for them and stabilize the output?

    Either way, it may be helpful to analyze the frequency response of the circuit by breaking the feedback loop. This allows you to analyze the frequency response of the open loop and feedback network separately, which can help with replicating the instability. By increasing the load capacitance to 500pF, the crossover frequency of the loop gain decreases and so does the phase margin, so the system becomes more unstable. 

    Also, adding a 50pF feedback capacitor (C3) in parallel with RF increases the phase margin from 34.66 to 57.93 degrees, stabilizing the system. The phase margin needs to be at least 45 degrees for the system to be considered stable.

    OPA828 Stability.TSC

    Best Regards,

    Alex Curtis

  • 0 in reply to Alex Curtis
    Prodigy 20 points

    Hi Alex,

    My original question was about replicating in TINA-TI what I see in lab. If I could not replicate such a fundamental behavior, I saw no point in proceeding with TINA-TI. Now with TINA-TI partially replicating what I see in lab, I did a feedbak loop stability analysis as you suggested.

    I ended up adding 100 pF directly from opamp output to opamp negative input, as Raymond suggested, as it gave better impulse response behavior.

    Kind regards,

    Axel

  • 0 in reply to Axel Bregnsbo
    TI__Intellectual 2670 points

    Hi Axel,

    I'll go ahead and mark this thread as resolved. If you have any additional questions, please let us know Slight smile

    Best of luck with your board,

    Alex Curtis