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INA819: Using Digi-Pot for gain resistor

Part Number: INA819
Other Parts Discussed in Thread: PGA855

Tool/software:

Hello,

I'm considering using a AD5272 1% digital rheostat for adjusting the gain of INA819 between 10-30.

I noticed the AD5272 input leakage current is ~50nA.  How significantly would this affect the gain setpoint of the INA819?

Thanks!

  • Normally, the current flowing through RG is (+IN − −IN) / RG. An additional leakage current of 50 nA would result in an input offset error of 50 nA × RG.

  • Hi Brian, 

    I have done a cursory check on the INA by adding parasitics. The biggest issue you will face is instability due to the capacitance that is added on the Rg pins. Taking the worst case of 90pF and the low gain I see significant overshoot from the gain of 20dB.

    This is confirmed by exercising the output stage by 10mV. 

    This is still the case even taking the 90pF on one leg. 

    An alternative approach can be found here:

    https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1198721/ina849-programmable-gain-circuit/4519597

    The RG pins of instrumentation amplifiers are very sensitive to parasitic capacitance. For this reason we recommend the gain resistors be placed as close to the Rg pins as possible in the layout and to minimize parasitic capacitance.

    Alternatively you may consider one of our PGA devices for programmable gain amplification such as the PGA855. 

    Tina Simulation:

    INA819 Gain.TSC

    Best Regards,

    Chris Featherstone

  • To follow up on Clemens response. I do see the additional offset he mentioned as well. So that would be the leakage current impact. See below. 

  • Thanks for the detailed responses. The link you sent was excellent.

    My application is for bipolar square waves between 0.1-10kHz, which are then rectified and lowpass filtered to DC.

    My latest version MUXes one of four RG resistors using 1/2 of the TMUX1109. I updated the TINA simulation. would appreciate your thoughts.

    INA819 Gain_TMUX1109.TSC

    Thanks!

  • Hi Bryan, 

    Running the 10mV step response exercising the output stage I see a small overshoot with no ringing which indicates this setup is stable. Layout will be important as well to minimize any added parasitic capacitance due to the PCB.  

    Best Regards, 

    Chris Featherstone

  • Thanks Chris. I'd like to replicate that 10mV step-response test on the bench with the real circuit. Do you have any app notes that talk about test setups for this? I'm sensing that it's nuanced and tricky to get right.