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TLV9002: How to Increase Phase Margin in a Differential Amplifier Circuit

Kaji@PAN
Mastermind 7340 points
Part Number: TLV9002
Other Parts Discussed in Thread: TPSM63610,

Tool/software:

Hello,

I am considering a circuit that can control CC by adding an external circuit to the TPSM63610.
The application note I am referring to is below.
I am using TLV9002 for the CC control circuit because it is used in this application note. It is used in Figure 3-1.

In the circuit I created, the switching frequency is unstable.
I suspect that this is because the phase margin of the differential amplifier circuit used in the CC circuit is low. Is there a way to increase the phase margin in the differential amplifier circuit?
I think it is also affected by noise, so I would like to slow down the responsiveness and increase the phase margin.

Best regards,

How to Implement a Simple Constant Current Regulation Scheme to a PCM Based Buck

  • 0
    TI__Guru**** 151866 points

    Hello Kaji-san,

    The placement of C1 in figure 3-1 is not correct. Start by removing this capacitor 

    • Caps between inputs

    –Every useful op amp circuit should work the same or better if a perfect op amp was used instead. A perfect op amp has infinite gain. So the voltage between the inputs would be zero. So any load placed between the inputs would have zero voltage and zero current; no effect what so ever. Therefore this capacitor only interacts with a real op amp's imperfections. Only the best experts could get any benefit from doing that. The so called benefit would change with op amp performance and also change if an alternate op amp was used. The best part of op amp circuits is that the external components set the circuit function with any good enough to perfect op amp.

     

    Below is better. Make R5, R6 not zero.