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OPA4228: The delay of the chip is different at low frequency and high frequency

Part Number: OPA4228

Tool/software:

The chip has different latency at low and high frequencies (above 5k). The delay is larger at low frequency。

Before the application of equipment only low frequency is OK, now is to achieve low frequency and high frequency are compatible, with PSPICE model simulation, found that the delay of the amplifier device is not the same, what is the reason?

  • Hi Hui,

    Could you measure the difference in delay and provide us a scope capture of this behavior and a schematic of the circuit you're using? We need more specific information.

    Best Regards,

    Alex Curtis

  • Application scenario: The chip is used in the "AC output voltage/current sampling" conditioning circuit as a differential to single ended converter.

    Problem: Regarding the delay issue of the operational amplifier chip model "OPA4228 (original TI)". Firstly, we conducted actual testing and simulated the PSPiCE model of the chip on TI's official website using SIMetrix software. Discovery 1) "Chip OPA4228" has an inherent delay of approximately 40ns. And 2) the delay of operational amplifier devices varies depending on the frequency of the input signal.After 5kHz, the simulated and measured delay stabilizes at 40ns ± 20%; Before 5kHz, the simulation and actual measurement delays will be larger.

    Therefore,

    Firstly, how is the inherent delay of chip OPA4228 generated and what parameters will affect it?

    Secondly, both simulation and actual testing have shown that there is a significant delay at low frequencies. What could be the reason for this?

     

    I hope to receive specific answers, thank you very much!

     

    2Corresponding electrical diagrams and waveforms

    Figure 1: Simulated circuit diagram, built according to the actual application electrical diagram

    Figure 2: Delay data of different frequency signals measured and simulated after passing through OPA4228 chip

    Select curve zero crossing measurement

    Figure 3: Example of simulation image; The green curve represents the input signal; The red color represents the OPA4228 output signal

    Input signal frequency: 50k; Total simulation time: 10m; Simulation step size: 1a-100n; Chip latency: 30n 

  • Hi Hui,

    Thank you for the detailed follow up, I appreciate it.

    From my understanding, the inherent delay in a real world opamp is caused by a number of things, such as parasitic capacitances and transistor switching times, that all contribute to the overall delay.

    I have a few thoughts on the results you've shared:

    1. I've replicated your circuit in Tina to simulate delay. We do not support Simetrix, but when I run your circuit in Tina TI using the same simulation settings (input is 400mV at 50kHz, with the transient simulation running for 0-10ms), I measure a timing difference of 35.11ns between when the input and output waves cross 0, which is similar but not exactly the same as what your simulation results are (30ns). After running the transient for 9.9798ms to 9.9806ms (to simulate the exact same timing window you have in your simulation screenshot), I measure a slightly different delay of 34.78ns.
    2. After replicating your circuit and seeing a similar result in TINA, I think the unexpectedly high delay at low frequency might be a measurement issue. Were you able to measure this behavior using more than one unit? If so, and you see the same results, I can try to replicate this circuit in hardware and measure this in our lab.

    OPA4288 Delay.TSC

    Best Regards,

    Alex Curtis

  • Hello!

    Thank you very much for your professional answer. We are very grateful

     

    1 Reply to previous questions

    You mentioned using multiple components for measurement, and we will try our best to allocate time for testing in the subsequent project progress. In addition, in ADI's chip "AD8221", we also found that there is a large delay at low frequencies, which seems to be a common problem with operational amplifier chips.

    AD8221 serves as the first stage operational amplifier, converting differential signals into single ended signals. Next is the operational amplifier device (TI-TL084I), followed by the analog-to-digital conversion chip "AD7606C-16BSTZ-RL". The circuit diagram is as follows:

    In addition, during the project, we found another issue besides "chip delay", which is that the gain of the operational amplifier chip changes continuously with frequency, and the output signal amplitude and input signal amplitude are no longer linearly related, but will exhibit nonlinear changes.

    We speculate that changes in chip gain may be related to frequency response characteristics. Attached below is a gain variation curve of the chip "OPA4228" that we actually measured (where the name "Second stage Operational Amplifier Gain" is the measured curve of the chip "OPA4228")

    So we will have some problems:

    ①What factors cause the gain variation of operational amplifier devices?

    ②The Bode plot we simulated using the previous circuit diagram in SIMetrix software seems to be incorrect and not consistent with the specifications. Did we make an error somewhere?

    We hope to seek a more detailed and professional explanation to find the reasons for the changes in gain of operational amplifier devices and the factors that affect them. Thank you very much!!!

     

    2 Some similar questions about the chip "TI-TL084I"

    In addition, in another current sampling circuit, we applied the operational amplifier chip "TI-TL084I" In the actual testing process, there is a delay of about 200ns The gain also undergoes nonlinear changes with frequency variation. The following is a schematic diagram about delay and gain

    (Image 1: Circuit diagram of actual application)

    Image 2: SIMetrix software simulation delay

    ①Select curve zero crossing measurement (both operational amplifier chips are "TI-TL084I")

    ②Input signal frequency: 50k; Total simulation time: 1m; simulation step size: 1a-10n;

    ③First stage operational amplifier delay: 94n; Second stage operational amplifier delay: 95n; Total operational amplifier delay: 189n

    Image 3: Actual gain variation during testing, where the gain varies nonlinearly with frequency

    Image 4: Simulated Bode plot, where the frequency response curve does not match the specification sheet

     

     

    Thanks again!!!

  • Hi Hui,

     

    To be thorough, I'll need a bit more time to respond to this. I should have a reply posted before tomorrow (1/16) at 5PM MST.

    In the meantime, I think you might find our TI Precision Labs videos on Op Amp Bandwidth helpful for understanding how amplifier gain varies over frequency.

    Kind Regards,

    Alex Curtis

  • Hi Hui,

    Thank you for your patience. 

    If you haven't already, I would recommend downloading TINA-TI, which is our free spice simulator that we support. Using the same simulator makes it much easier to compare simulations and troubleshoot any issues.

    The open loop gain (Aol) of an operational amplifier varies over frequency. Aol of an op amp represents the maximum gain that can be applied over frequency to the differential inputs of the device, and this is the curve we show in the datasheet. Ideally, the open loop gain of an amplifier is infinite, regardless of frequency, but this is not the case in real devices.

    In the simulation you performed, it looks like you were actually measuring the closed loop response of the amplifier, not the open loop gain. The closed loop response (Acl) includes the effects of the feedback network (Beta), which is why your simulation plot is different than the one in the datasheet. For more details on breaking the loop to determine the open loop response and evaluating the stability of an amplifier circuit, see our TI Precision Labs presentations on stability. The second video in the series (phase margin) covers a lot of helpful information on how we do stability simulations. You can find the presentation slides for this video with a transcript here: https://www.ti.com/content/dam/videos/external-videos/en-us/1/3816841626001/4080254925001.mp4/subassets/opamps-stability-phase-margin-presentation-quiz.pdf.

    Using the method of breaking the loop outlined in the slides, I simulated the loaded open loop gain of the OPA4228 circuit. This frequency response closely matches with the plot shown in the OPA4228 datasheet. I was also able to replicate the same closed loop response from your simulation, which shows gain peaking without the feedback capacitor.OPA4288-Delay-Stability.TSC

    Regarding your second set of questions, what are the component values used in the circuit with the TL084I? If you send an image of the circuit you simulated, I can replicate it in TINA. Let me know if you have any questions.

    Best Regards,

    Alex Curtis