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TLV07: Some samples show unexpected output result

Ryuuichi machida
Guru 13485 points

Part Number: TLV07

Tool/software:

Hi,

My customer observed unexpected output on some TLV07 samples.

* Some samples show large "remaining voltage" and will converge after certain time.
On the other hands, Almost samples show small "ramaining voltage".

We would like to know root cause of this issue.
I attached files which show "overview" and "detail" for our issue. Please confirm it and could you give your feedback ?

Best Regards,

Unexpected behavior on TLV07.pdf

  • 0
    TI__Guru 55466 points

    HI Ryuuchi,

    Thank you for the presentation that describing the behavior.  Can you kindly provide a schematic showing the multiplexer part number, the feedback resistors (and capacitors), any RC load between the ADC and amplifier, and the ADC?

    Can you kindly share the capacitor part numbers that may be involved?  Among ceramic capacitors, we typically recommend C0G high-grade capacitors on the signal path for applications that require fast settling, as some other lower grade ceramic capacitors have dielectric absorption that can manifest as long settling times.

     Thank you and Regards,

    Luis

  • 0 in reply to Luis Chioye
    Guru 13485 points

    Hello Luis-san,

    >Can you kindly provide a schematic showing the multiplexer part number, the feedback resistors (and capacitors), any RC load between the ADC and amplifier, and the ADC?
    => Sorry, it is difficult to disclose schematic info at this time.
    However, I heard that they do NOT implement any discreate capacitor between output of OPAMP and ADC.
    I described "ADC" in previous thread, however in fact they introduce "double integrating type ADC", so they configure ADC circuit by using resistor, analog switch and opamp.

    >Can you kindly share the capacitor part numbers that may be involved?
    => As I described above, they do not implement any discreate capacitor b/w OPAMP and ADC.

    >Among ceramic capacitors, we typically recommend C0G high-grade capacitors on the signal path for applications that require fast settling, as some other lower grade ceramic capacitors have dielectric absorption that can manifest as long settling times.
    => Yes, at first we suspect "settling issue" or "load issue".
    However, we can not explain this condition due to below.

    1. This phenomenon is observed only case of "input 1 -> input 2" and "input 3 -> "input4".
    2. They did not connect so heavy load at the output side.

    BR,

  • +1 in reply to Ryuuichi machida
    TI__Guru 55466 points

    Hi Ryuuichi,

    The word document describes a settling issue, where the device needs to settle within a certain window in 200ms.  What is the resolution of the target settling voltage window? For example, is this voltage ±10mV or ±100µV?

    What are the voltage supplies and what components are used in the feedback? What signal source is use to generate the input signal.

    We would need a detail schematic and a detailed description on the test conditions.  It is hard to comment without the circuit details, without this information one can only speculate.

    Thank you and Kind Regards,

    Luis

  • 0 in reply to Luis Chioye
    Guru 13485 points

    Hello,

    Thank you for your reply.
    As you said, we also need more detail about customer's circuit. Then I asked this to customer. However customer said that they found other suspected point in their system, so they will focus to investigate about this.
    Therefore, they said they would like to stay this as pending for a while.
    So, I will close this thread at this time, and when we need to re-investigate from viewpoint of OPAMP, I will re-open thread.

    Best Regards,