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Welcome to the forum and thank you for your question.
I can’t decipher your text, but I can see what’s happening in the circuit.
This is not a model issue or an effect of gain non-linearity.
The issue is the increase in input bias current (IB)(~58uA change) when Vcm exceeds Vs. Given you have around a 4.7 Ohm shunt resistance, the offset from IB (Vos_IB) will increase by 270 uV. And this is gained up to 27mV at output, which is exactly what you’re seeing.
See Figure 7-20 to understand this device behavior.
Thank you very much for your quick answer. It was very helpful.
I'm afraid I typed it in Japanese. Here is the English translation for your reference. ------------------- When the current was converted by the circuit shown in the figure, a step occurred in the graph. -> As you understand. Is this phenomenon expected from the design of this IC? -> Already answered. Please tell me if there is a way to reduce or eliminate the step. -> I would like to use the current circuit, but if you have a good idea, please let me know.
No problem. If you want to eliminate/reduce this step, then you need to decrease shunt resistor (R1) and then switch to higher gain variant (INA4181A4).
Or you could move the amplifier to the low-side of the circuit.
