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INA226: Questions regarding the SMBUS interface of INA226

Part Number: INA226
Other Parts Discussed in Thread: INA233

Tool/software:

Hi,

Pls check and help on the customers questions regarding on the SMBUS/PMBUS interface of INA226AIDGSR as below:

1. Can PMBUS/SMBUS recovered by sending nine continuous CLK pulse when the SDA or the Bus lock-up?

2. If the Bus can be recovered from lock-up, does it need to rewrite and reconfigure the register of INA226?

3.If the Bus is not in lock-up status, what could happen if the master send nine continuous CLK pulse? Could it cause any other issue?

4. For the SMBUS timeout it indicates reset the interface only when SCL is low longer than 28ms, would it also work for the SDA lock-up?

Thanks.

BR,

Manu

  • Hello Manu,

    Just to clarify, the INA226 is SMBUS compatible, not PMBUS. If you need PMBUS, then you may be interested in the INA233.

    Here are my responses to your questions:

    1. 9 clock pulses is not guaranteed to reset the device. The registers for this device are 16 bit, not 8 bit, so if the INA226 has pulled low from starting a communication then it could take up to 18 clock cycles for it to finish. This is not technically a reset, but 18 clock pulses will finish any communication after the INA226 has started to pull down, so if the INA226 is holding the line low, then 18 clock cycles should release it.

    2. No, the configuration will remain, as long as the device has not been power cycled and the rest bit of register 0x0 has not been written to. 

    3. If the INA226 has not been addressed, then it will not have problems from a burst of 9 (or 18) clock pulses. 

    4. Yes. If SDA is locked-up (held low by the INA226), then if the SCL is held low longer than 28ms (35ms max), then the INA226 will timeout and release the SDA line.

    Regards,

    Mitch