OPA818: Thermal pad isolation issue

I know the part doesn't have a ground pin .By ground I meant virtual ground ie point to which non-inverting input is connected when the part is used as a TIA. Thanks for answering about substrate connected to VS-. So do you agree that when supply rails are slid in a positive direction current will flow via Vs- pin -> substrate ->ESD diodes ->E-pad ->board ground -hence the excessive current when rails are slid in a positive direction? Also what do you propose for heat-sinking the E-pad in my application ? Just connect to virtual ground (Vin+) pin and make this into a ground plane or do you have a more elegant solution? Finally for the prototype assuming just quiescent current and 2mA load (say 300mW total 25 deg/C ambient ) will the part function reliably withe the thermal pad isolated from PCB or with just a PCB pad of recommended PCB footprint size on the top layer of board ?

The characteristics of the ESD diodes are not specified; you should not allow DC current to flow. The pad should be soldered down; its voltage should be either VS−, or left floating.

The datasheet just says that "the thermal pad should be connected to a heat spreading plane that is preferably on the same layer as OPA818 or connected by as many vias as possible if the plane is on a different layer".

With 300 mW, the junction would be about 16 °C above ambient, which is OK.

Hi Steve,

As Clemens mentioned, the substrate is at the most negative voltage, i.e., VS−. And you are correct that the thermal pad is electrically isolated from the die substrate but ESD diodes down-bonded to the thermal pad. It is recommended in the datasheet to connect the thermal pad to GND of 0V. 

In your case, if are you connecting the thermal pad to absolute 0V or GND, then what is happening is that the ESD diode from substrate (Vs- = +1V) to thermal pad (0V) is getting forward biased, and pulling more current from VS−. To confirm if this is the issue, can you try to reduce VS- ato 0V and see if it is still taking high current from VS-?

One solution that I can think of is to tie the thermal pad to VS-, if possible, so that the ESD protection diodes are not forward biased. 

Regards,
Aditya Gosavi

Thanks Aditya. Yes I did mention earlier and can confirm, with Vs- = -5V or Vs--=0V all is good but as soon as this pin is greater than around +1V -Ve supply current increases rapidly so yes we are agreed that the internal ESD diodes are the cause of my issue. Also thanks for confirming that I can get away without thermal pad - means i can insulate for now rather than re-spinning board. One question which is best to have the pad floating, connected to -Vs, or to have the pad connected to the midpoint between Vs+ and Vs- ? All are easy to do. bear in mind that midpoint is switched between 0V and +18V along with Vs+ (=Vmid+5V)and Vs-(=Vmid-5V). If it makes any difference input DC leakage is very important and frequency is -3dB at 2MHz.

Forgot to add TI might want to update datasheet to delete the electrically isolated reference because it is incorrect because ESD diodes/leakage prevent isolation. Maybe say generally leave pad floating or connect to Vs-. but could be connected to ground as long as ground is positive relative to Vs-. Just a thought.