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INA333: CJMCU-333 MCU and Impedance to Ground

Part Number: INA333
Other Parts Discussed in Thread: ADS1299, INA350, TINA-TI, OPA350

Tool/software:

Hi,

I'm really a software developer and not good at electronics, so please bear with me.

I was recommended the INA333 as a pre-amp for reading EEG, and bought the following module to have a play with it before potentially using a more complex/custom board design

Schematic

Currently I do not seem to be getting the sort of noisefloor I was hoping for; I think the layout of the board makes sense to me, but in particular I note from the datasheet that:

> 8.2 Typical Application

> The output of the INA333 device is referred to the output reference (REF) pin, which is normally grounded. This connection must be low-impedance to assure good common-mode rejection. Although 15 Ω or less of stray resistance can be tolerated while maintaining specified CMRR, small stray resistances of tens of Ωs in series with the REF pin can cause noticeable degradation in CMRR.

Right now I am considering single-channel only, so the inputs are a true differential pair between two electrodes, one as the reference.

The board provides a single supply voltage, so I understand the reason for fixing the reference output halfway between +3.3V and ground with R4 and R5, and therefore that using low-value resistors here would draw an enormous amount of current from the positive rail. However, given that the datasheet explicitly mentions the importance of having a low-impedance path to ground for the reference pin, I am wondering, is this an error on the part of the designers of the board? Or is there a reason why it would be expected and a valid thing to have something as high as 10kΩ in this configuration?

I have tried putting a small resistor between the reference and ground, and not seen much improvement in the noise levels, although that may be an issue elsewhere, especially whilst I am prototyping and the noise all the way through will be somewhat high.

Would anyone have an opinion on the design of this board at all please?

Thanks a lot

  • That module is garbage; remove R4 and R5. You can generate the reference voltage with a resistor voltage divider, but then you should buffer it with an opamp.

  • Thanks for getting back to me so soon,

    If I simply desolder the resistors, should I still see a valid voltage on the output? Or will I need the buffering plus path to ground as you say? Currently I am simply feeding the VRef and VOut pair into my ADC (based on an AD7771, but I also have an OpenBCI Cyton using the ADS1299) as a bipolar input. I should be able to configure this as a single-ended input though; as the module currently stands this hasn't seemed to have any effect, but I can try with them removed.

    Are there other things on it you'd consider garbage?

    Cheers

  • Hey Ben,

    So here's a more unpacked answer to add to what Clemens provided. I'm starting from fundamentals as you have stated an unfamiliarity with hardware. Let me know if something I've explained is already in your purview.

    A schematic example of how to drive the ref pin with a low impedance source is below (from the INA350 datasheet):

    Internally, the reference pin goes to an op amp configured in what is referred to as a difference amplifier.

    Essentially you can think of this as two resistor dividers, one that feeds into the non-inverting input of the op amp, (1: resistors between output of A2 to REF) and one that the op amp (A3) controls (2: Resistors between Output of A1 to VOUT) . The op amp is going to try to force an output voltage to set the inverting input equal to the non-inverting input. When all these resistors are equal to each other, the gain from A2 to Vout and the gain from A1 to Vout are equal in magnitude but opposite in sign, so the output at A3 is VoutA2 - VoutA1 (which is where the difference comes from). Adding impedance onto your ref node will imbalance the resistor divider seen on the output of A2, and will now no longer give you an equal scaling for your A1 and A2 outputs.

    This will give you an unexpected output gain/scaling (generally referred to as gain error), but may not necessarily manifest as too high of "noise".

    It's not inherently clear what gain the INA333 is configured in. I wasn't able to find information on what the value of R2 is. However, it's important to note that the noise specified in the datasheet is input-referred noise. This means that whatever gain you have will multiply the input noise and show up on the output.

    In very high gains, you may see higher than "expected" noise on the output, as this input-referred noise value will be gained up and seen as output noise.

    Additionally, for very high impedance sensors, there is another effect at play. The INA333 is what is called a chopper amplifier. This amplifier uses high frequency switches at the input to drastically reduce the DC offset of the device due to the mismatch in the input transistor differential pair. Here's a good overview of chopper operation and how to optimize the performance of your chopper circuits. https://www.ti.com/lit/wp/sboa586/sboa586.pdf. In a shorter-form explanation, the switches have small spikes in input current when switched on and off. When these small current spikes find a high impedance input, they can generate a substantial voltage relative to your input signal amplitude. These input spikes are then amplified by the INA333 and seen on the output.

    Let me know if any of the above sound like likely culprits for the noise you are seeing, or if you have any further questions!

    Best,
    Gerasimos

  • Thanks a lot, the detailed and slow explanation is much appreciated!


    Good point on the pot - I assumed it would over the full sweep up to a gain of about 1k, but that may not be the case.

    I think I am following the first paragraph - so the reason the datasheet for the 333 says not to induce stray resistors after the reference pin is because integral to its operation are the precision-matched resistors inside, so if I bung any old component on afterwards that's goin to wreck those. And if I feed that into either my ADC or an op-amp, the input impedance should be very high and in a perfect world it's a voltmeter that has no effect on the internal system and is indistinguishable from an open circuit, so that impedance doesn't affect it in the same way(?)


    If I understand correctly, input-referred noise is conceptually treating noise within occurring the circuitry as if it were an extra source added onto the inputs, and as if the circuit were completely noise-free. So by this do you just mean that, the noise is specified in such a way (e.g. at a particular gain) that it's tied to the input source, as then increasing the gain naturally means this noise gets louder at the outputs (and so will the signal), so that's a more convenient way of expressing it?

    So far I've not been making numerical measurements, just a visual inspection. I was recommended the 333 given that it has ~30dB better CMRR than the 7771, in particular at low frequencies (in EEG, almost all we care about is below 30Hz) where it's off the chart on the 7771 datasheet. Although I'm not sure if there's a way of knowing if a significant proportion of the noise I see without the 333 is likely to be common on both leads or not. Some of it will probably be my body too.

    I have a signal generator here (not remotely a good model of real electrodes pinned to a subject, but that's quite hard to replicate without using gelatine and therefore a limmited shelf-life), plugged direclty into my ADC, and then also into the input pins on the module. I'm then just taking VOut and VRef and feeding that into a second channel on the ADC. From the scale on the left, we can see it is amplifying the signal quite a way; but the high-frequency noise over the carrier signal is worse than for just the signal generator => ADC scenario.


    So, I can try desoldering R4 and R5 from the module and see what happens.

    From the 350 datasheet:

    > Often in dual-supply operation, REF pin connects to the low-impedance system ground. In single-supply operation, offsetting the output signal to a precise mid-supply level is useful (for example, 2.75-V in a 5.5-V supply environment). To accomplish this level shift, a voltage source must be connected to the REF pin to level-shift the output so that the INA350 can drive a single-supply ADC.

    So as the current module provides a single supply through the LDO (which I don't think I actually need, as I should have a very stable battery power supply from the ADC anyway), is connecting to an extra opamp to buffer the reference the only way to go? Or would VOut and VRef without R4 & R5 form a valid dual or single input to the ADC on without this? When it mentions ~15Ω of stray impedance, does that only apply to when it's in dual-supply mode (and thus I can see how shorting it to ground would make a lot of sense), or in both cases?

    So far I have been taking the power supply from the ADC (for convenience); I need to check if this is using single- or split-supply internally, but it may be I can take a dual supply off that.

    Thanks again

  • And if I feed that into either my ADC or an op-amp, the input impedance should be very high and in a perfect world it's a voltmeter that has no effect on the internal system and is indistinguishable from an open circuit, so that impedance doesn't affect it in the same way(?)

    Almost, this is where the understanding left the rails. Ideally the reference voltage would be applied from a low-impedance source (like the output of an op amp, or a voltage reference)

    If I understand correctly, input-referred noise is conceptually treating noise within occurring the circuitry as if it were an extra source added onto the inputs, and as if the circuit were completely noise-free. So by this do you just mean that, the noise is specified in such a way (e.g. at a particular gain) that it's tied to the input source, as then increasing the gain naturally means this noise gets louder at the outputs (and so will the signal), so that's a more convenient way of expressing it?

    Exactly right, it provides a lumped model for easier analysis.

    Ah so that is a 100k Pot, with an external resistor to set a min resistor of 100ohms when the pot is completely turned. Generally these components should be laid out very close to the RG node of the INA333, as a very small amount of parasitic capacitance can cause stability issues. In DC, you can check the output of your instrumentation amplifier on an oscilloscope, and check for oscillations.

    To take out some of the ambiguity of layout related issues, there are some evaluation modules that TI offers that can help with prototyping. Here is one that works with the INA333.

    https://www.ti.com/tool/INAEVM

    I'm a little curious about your measurements since there are negative values shown. Is that negative below your ADC vref? Additionally, what ADC are you using for this?

    Best,
    Gerasimos

  • Almost, this is where the understanding left the rails. Ideally the reference voltage would be applied from a low-impedance source (like the output of an op amp, or a voltage reference)

    Okay, as I type this I only just realised that the triangle in your diagram is pointing the other way (I said I wasn't very good at all this!!). I was reading left-to-right and my mind was seeing the two pins as in the 333, apologies. 

    So in very simplistic terms (I'll ignore the capacitor, presume it's for smoothing) - the two 100k resistors are just a voltage divider generating a 2.5v reference. This goes to the non-inverting input of the 9041 in your diagram, which tries to drive the output to the same voltage and so the whole bottom-right is just acting as a voltage source, which is "conceptually" going "into" the 333 to set the reference voltage as the midpoint, if you'll forgive the "loose terminology".

    If I've got that right this makes sense; I understand with electronics you don't always get as clean a concept of input and output the same as other fields, in that it's a network and current can flow all over the place (and I need to start rotating the page 90 degrees or reading right-to-left more and then I might understand things that seem beyond my knowledge at first!) But the way the original board was laid out moved my mind to thinking of VRef as an output. But it makes sense to me as something you want to peg at a given place and leave it there, so we want the output of an op-amp.

    Whatever the pot is seems to be quite large and unfortunately looks like it's linear as I get very little amplification for along time and then I turn it full-whack and the outputs are clipped. It's a bit hard to tell due to the extra noise I get when turning it especially when breadboarding things, and if I increase the input voltage to make it easier to see, the outputs saturate. It seems some other boards have more expensive trims on them, does hit me that this one looks quite cheap and basic. But it's for protoyping mostly :).

    I can have a go looking for oscillations; a problem I ran into immediately is the only scopes I had access to were not nearly sensitive enough to go to microvolts so I was just seeing a pixellated carpet of noise, and the scope/probe itself was also causing a large part of it. to that end I was using the 7771 to debug the scope and not the other way round. But that would be a good test at a constant input, I should try that on my ADC too.

    And correct - there I just plugged VOut and VRef into the ADC as a differential pair, so the top in green is VIN+ and VIN- and in theory ought to be centred on 0 but I know I made a hash of some wiring so never mind, and the yellow output from the 333 is flipped just as I plugged the jumpers in the other way round. As the plotting centres and scales itself though whatever setup I have it's usually visible to me from the "thickness" of the trace comparatively how good or bad the SNR is. This is the board if you're interested.

    I will take a look at the eval board, and am also about to try getting the TINA version provided running under WINE so hopefully I can have a coarse simulation of the chip itself.

    Thanks again

  • Hey Ben,

    So in very simplistic terms (I'll ignore the capacitor, presume it's for smoothing) - the two 100k resistors are just a voltage divider generating a 2.5v reference. This goes to the non-inverting input of the 9041 in your diagram, which tries to drive the output to the same voltage and so the whole bottom-right is just acting as a voltage source, which is "conceptually" going "into" the 333 to set the reference voltage as the midpoint, if you'll forgive the "loose terminology".

    This is correct!

    Yes, in circuits there is a bit of "relativity" where you can both think of VREF as an input (the input into INA333) but also it is an output relative to the op amp that is generating it.

    Something that can be helpful for your scopes is limiting the bandwidth. Since this is a low-frequency measurement, you don't need the bandwidth all the way out to 500MHz (an arbitrarily picked bandwidth for example) and you can set your bandwidth limit to lower than this. This will keep the oscilloscope from integrating noise outside of the frequency of interest.

    I have not tried to use TINA-TI in anything other than windows, so I do hope that WINE works out for you! If it does, documenting any issues you overcame with it would be awesome, as we can use that to help others in the future!

    Best,
    Gerasimos

  • Thanks, l I will try that on the scopes. They're not mine, and actually I find the old analogue ones easier to work with (and prettier)! But that makes good sense to try.

    So far looks okay on WINE. I have not yet actually tried running a simulation; but the GUI starts, and instead I was able to export the SPICE macro and then import it into QUCS-s running natively, also not yet actually run as I've been doing alright with breadboarding so far. More than happy to document any problems if they come up.

    I managed to find an OPA350 amongst some parts drawers, so currently I'm driving it with that. I'm trying to see if I can find a TO-92 or similar through-hole reference I could use though, as shortly when I start making a more permanent setup I'll need to have this ideally quite close to my head, and something in a package like that I think I can solder reasonably. Would you happen to have any recommendations at all?

    Thanks again,

    Ben

  • Hey Ben,

    https://www.ti.com/power-management/voltage-reference/products.html#2954=SOIC&

    Here's a parametric table result of voltage references that are available in SOIC, feel free to look for other packages, but I find SOIC to be a good balance for easy to hand solder and small enough. The recommendation for what you need depends on input/output voltage requirements.

    There is a reference that can make a 1.65V reference off of a 3.3V rail: https://www.ti.com/product/REF2033

    However, it's only available in 5 pin SOT-23-THN, which can be a pain to solder by hand.

    I couldn't find any other voltage references that supply a 1.65V output, so you may have to adjust accordingly.

    Best,
    Gerasimos

  • Thanks again. I'm absolutely terrible at soldering so was looking for something that would be relatively difficult to mess up and hopefully could be added without needing to knock up a PCB (at this stage). I'll take a look at that page but I reckon a package that small is probably beyond me. Right now I'm reviewing the data and discovered there was a difference between a couple of leads so I'm not sure I'm seeing any improvement in the noise levels using an opamp vs the resistor divider. Today I'll try adding the return path for the bias current and see if that helps. The datasheet mentions the possibility of saturation without it (which I don't think is a massive concern given the input signal is so small, and empirically when I AC-couple the electrodes I don't see evidence of this), but from the Precision Instrumentation video on bias current I'm learning with relatively high input impedance (I'd say 3-20k) it can cause a differential voltage, so will see if this has any effect.

  • Another quick question on this module - is there a good reason (i.e. general good practice - understand there may be other be application-specific reasons, but I don't know what parameters the board designers were using) for the two caps to ground on the input pins?

    I have been reading through the documentation and learning about properly managing bias current etc. and now have trying out several different permutations in TINA to try and make sure I can reproduce different scenarios and verify I understand correctly. Initially I have left those caps in as I simply wanted to start by mocking up what I have in front of me. But it seems the 50Hz rejection in simulation is better if I simply take them off. At first I presumed they might be used as bypass capacitors as with on the power supply pins, but now I look through the datasheet again, and a few different circuit mockups I've seen, I don't think I have seen capacitors on the inputs except where there's a specific filtering reason based on the input signal that's desired.

    In my case it seems that they're not helping for the frequency ranges I'm interested in - before I heat up the iron and try removing them, is there a reason I might want to keep those around the input pins?

    Thanks

  • Hi Ben, 

    You can add capacitors to the input pins for input filtering to reduce EMI or noise. We have the recommended how to design and size these capacitors in the Analog Engineer's Pocket Reference as well as a tool in the Analog Engineer's Calculator. 

    Analog Engineer's Calculator: 

    Please let me know if you have any questions.
    Thank you!

    Regards,
    Ashley

  • Hey Ben,

    Some additional context here, these capacitors to the input provide common-mode (same signal on both inputs) and differential (different signal on each input) filtering.

    This helps externally filter your common-mode and differential signals. However, this implementation is incorrect, and there should be a cap between each input that is at least 10x larger than the cap on IN+ or IN-. This capacitor between inputs prevents any capacitor mismatch from generating a differential signal on the instrumentation amplifier inputs, increasing your error.

    Best,
    Gerasimos

  • Okay, so as expected, poorly-designed off-the-shelf filtering - thanks both of you. The TINA simulation indicates it's better without and removed them on one board and not really seeing any improvements so still trying to work out the dependent variable. Trying to see if I can get hold of some better test equipment. And/or will just knock up a vanilla board with everything done according to the comments here/datasheet and see if that's any better.



    (Sorry for the delay also, looks like my reply didn't send when I first wrote it :) )