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TLV1922: Indeterminate output

Part Number: TLV1922

Tool/software:

Hello Team,

I am looking to implement TLV192x in my design but I am confused about the indeterminate state when IN+ = IN-. The data sheet says "output state is determined by the random polarity of the internal offset voltage" . So during equal inputs, the comparator "sees" just the offset and defaults to that polarity? Is there any way to pull the signal low during these equal input cases?

Thanks,

Erika

  • It is not possible to detect this case except with another comparator with a lower input offset error.

    What is the actual problem you're trying to solve?

  • Hi Clemens,

    Looking to have the following truth table. I am unsure if this would be the best device for this problem- may need to move to discrete logic. 

    Thanks,

    Erika

  • Hello Erika,

    Discrete logic will have the same problem - real-world devices will also have different offsets and thresholds.

    You cannot have both comparator inputs at the same *exact* level. What would you output if you saw 1.33335V and 1.33335V on your inputs??

    The comparator can only tell you if one input is higher than the other. It does not have an "equal" output.

    In the real world, the comparator has input offset voltages in the sub millivolts. Offset will never be 0.0000V, and even then, there is random amplifier noise on top of that....which would cause chatter at 0V. As the inputs come within micro volts of each other, the output can "chatter" on the internal noise.

    For real devices, the internal ±mV offset voltage will add an internal offset. Because of the distribution of the offset voltage (it can be positive or negative), you have a 50/50 chance of high or low output across devices when IN+ =  IN-.

    Proper design has the output state pre-determined if both *circuit* inputs are at zero by inserting a slight offset (few mV) to one input of the comparator. This is done with either a slight bias to one input.

    The TLV1922 has about ±3mV of built-in hysteresis, which helps with the "chatter" when near zero, but it does not determine the output state at 0V. External offset will be required to set the state.

    Can you describe, or provide a schematic of your circuit?

  • Hi Paul,

    I realized I mistook my input voltage levels, as one will be higher which would result in the above table. We can go ahead and close this thread. Thank you for the in depth evaluation Slight smile

    Best,

    Erika