Tool/software:
Hello TI support,
I am working on one circuit of TLV387 where in AOL analysis reveals circuit to be stable with PM=75' when AOL=0dB. However, at 27dB there seems to be lower PM=~ 45. Transient analysis looks to be stable. I will appreciate few queries,
1. In general any opamp circuit is stable or unstable when in between PM reduces to <30' while at AOL=0dB PM>=60' or so?
Details of the circuits & simulation results are attached below.
Regards,
JK
JK,
Running AC stability analysis shows a very stable circuit with 66 degrees phase margin whereas the minimum recommended is 45 degrees. The phase dipping at mid-frequency below 45 degrees is not a problem because the stability of the circuit is determined at the intersection of AOL and 1/beta - see below.
Running transient analysis confirms very stable operation with overshoot of less than 8% whereas the maximum recommended is 25% - see below. Having said that, keep in mind that the stability is determined directly at the op amp output (VF1) and NOT at on the right side of Riso resistor (Vout) - see below.
Few more comments: There is no need for D1 and D2 input protection diodes because 492k input resistor limits the current far below allowable 10mA.
Also, unless you expect fault condition pulling Vout above Vcc, there is no need for 3.3k feedback resistor. Removing FB and lowering Riso to 50ohm maintains a very stable system - see below.
The stability of the circuit is determined ONLY by the phase shift at frequency where the AOL and 1/β intersect and no amount of phase dipping anywhere else changes this. Why at the intersection and not anywhere else, you may ask? Because in order for instability to occur AOL*β = -1 and this is only possible where magnitude of AOL*β = 1 and the AOL*β shifts by 180 degrees; keep in mind that magnitude of 1 on linear scale is 0dB on decibel scale, therefore, at the intersection of AOL and 1/β, AOL*β=0dB or 1 (linear scale) - see below. Thus, as we evaluate the phase margin we only need to look how much AOL*β shifted from its DC value at the point of intersection frequency (effective bandwidth).
Now, you seem to keep asking what is the acceptable phase dipping (of course, below frequency where AOL*β=1), thus this brings me to say that from the purely stability point of view it does not matter (signal will eventually settle even if the phase dips to zero) BUT in order for the signal to settle relatively fast, without any erratic jumps, 'my' rule of thumb is you should not allow the phase dip, within the effective bandwidth of the circuit configuration, below 20 degrees.
