DRA80XMEVM: About PCIe Inbound Address Translation

Part Number: DRA80XMEVM

Tool/software:

I would like to expose the first few hundred bytes or so of the PCIE1_DAT1 area (address 0x05600000~) on the board side to the Root Complex side via PCIe.
Even if I set BAR0 on the Root Complex side, I cannot get the expected value and it is ALL 0xF.

The following registers also fail to read. (0xff is read)
From a specification standpoint, I understand that these registers are readable from the RC side.
PCIE0_CORE_ECC_AGGR0 (0x0002A28000)
MMC0_CTL_CFG (0x0004F80000)
ELM0 (0x0005380000)
GPU0(0x00053A0000)
PCIE0_DAT(0x0005500000)
PCIE1_DAT(0x0005600000)
GPU0_KLIOMP1_HYD_MMRS(0x0007004000)

Regarding the PCIe specification,Is it correct to understand that all memory areas on the EP side can be exposed to the RC side?