LOG300: Pulse width distortion

Part Number: LOG300

Tool/software:

Hi.

I have a prototype using a LOG300DR followed by a data slicer on the Buffer output, to receive an OOK (on-off keyed) signal. To test, I gate the 337.5kHz carrier with a lower frequency square wave of 50% duty cycle, thereby simulating a string of 1010 repeating. What I find, is that the LOG300 log amp stage reacts quickly to the start of the carrier, but not when the carrier is gated off. The effect is that the duration of the high pulse (corresponding to carrier present) is increased by about 15us, with a corresponding decrease in the low pulse duration. Furthermore, the falling edge of the LOG300 output signal is 'noisy' / contains ripple, which leads to variance in the high pulse duration.

This happens with and without a filter between the LNA and log amp. The log amp inputs are in both cases matched with the same components, including 1kΩ on the Log_Inm pin.

3.3V supply, R_F = 30kΩ, C_OFFSET = 18nF, REF_RES = 56kΩ

Changing C_F from the 270pF I designed to 100pF didn't make much difference (except for increasing the noise in the signal).

So far, the only 'solution' is to lower the data bitrate to the point where 15us doesn't matter much, but that is undesirable from a system point of view.

I've wondered if the log amp output or buffer goes into saturation, given that the output goes high with carrier present. This might imply saturation recovery is the mechanism at work here.

Do you have any recommendations?

  • During the High to Low transition , the fall time is decided by the CF and RF on the LOG_OUT pin. what are the values of CF and RF in your board ?

    Can you try probing the LOG_OUT pin directly using a 1Mohm probe ? This will give us an indication if op-amp saturation is a issue. LOG_OUT pin is  native detector output.

    I have also seen input signal decaying slowly owing to the BPF or any other cap in the input signal chain can also slow down the LOG300 output. Is it possible to apply a simple cap coupled input to LOG Detector block input directly without any BPF ( Bypass LNA and give it to LOG 300 input directly ) .

    1) Above all as mentioned the fall time is CF and RF ,is the time constant of the fall time matching with that of CF and RF .

    2) Any waveform you can post here

    3) what is the rise time you are achieving

    4) what is the ideal rise and fall time acceptable to you  

  • I also got a note from the designer that can you try cutting down the offset cancellation cap to 1/4 . He believes the offset cancellation loop can be made faster to make the LOG300 respond faster.

  • I fed a signal (yellow trace) through 100nF on pin 12 (SOIC package). Pin 11 has 100nF to ground. I then measured on pins 5 and 10 (blue trace).

    I used two signal levels to compare: 10mVpp and 100mVpp. With the bigger signal, the high level on pin 10 saturates, and then the delay on the falling edge appears. This proves the saturation recovery theory in the buffer. It is also visible in the seemingly reduced rise time.

    Thank you for your suggestions, I'll continue studying and improving my circuit - there might be other factors too.

    Pin 5 @ 10mVpp

    Pin 10 @ 10mVpp

    Pin 5 @ 100mVpp

    Pin 10 @ 100mVpp

  • Understood your point .

    i would also like to point out , the last plot shows it is limited by the offset cancellation loop bandwidth.  we can suggest to use 2nF offset cap and check the transient time again. Also can you check if there is large cap on buffer out . Can you also check buffer inverting out. You will see an inverted output , but we can check if indeed the overdrive recovery behavior is seen there as well.