AM62L-PROCESSOR-SDK: OSPI chip select conflict issue

Hi Xiong,

The assigned topic expert is out of office through the rest of this week. Please ping the thread if you do not get a response early next week.

Regards,
Johnson

Hi,

xiongwei said:

We have found that use CS0 (connected to 8-wire NAND flash) and CS1 (connected to 4-wire NOR flash) may result in chip selection conflicts, as shown in the waveforms of CS0 and CS1 in the following figures.

If you see both Chip Selects going down at the same time, my follow up questions are:

1. Do you see this while booting?
2. Do you see this while performing a Flash operation(Erase, Writes or Read) on one of the Flashes via a single chip select(CS0/CS1)?

Looking forward to your response.

Regards,

Vaibhav

Hi，

1.During the kernel startup process, the measured cs0 and cs1 were simultaneously pulled down

2.There is no problem using CS0/CS1 alone, it can be erased, written, and read normally

Hi Xiong,

xiongwei said:

We have found that use CS0 (connected to 8-wire NAND flash) and CS1 (connected to 4-wire NOR flash) may result in chip selection conflicts, as shown in the waveforms of CS0 and CS1 in the following figures.

Is it on a custom board? If yes, what else is connected on chip selects?

Also, what steps you are performing to switch among chip selects? 

Thanks,

Stan