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TLV7011: Simulation model clarification

ArTzy
Genius 17475 points
Part Number: TLV7011

Tool/software:

Hi Experts,

Can you help us fixed this issue of the model?



TLV7011_sim2.TSC

As you can see, the supply of TLV7011 is fixed to 5V, and by connecting the inputs IN+ and IN- to Vcc and Vee, respectively, will not violate the common-mode (though this is comparator, CM might not an issue).

No matter how the VG1 supply is changing [(0 to -5V @ 1ms), then (-5V to 5V @1ms)...with the set-up above, the output should always equal to Vcc.

Thus, expecting for the voltmeter (BIAS) to be always equal to zero (since Vout should be equal Vcc).

But the result is different:

Can you support this issue?

Regards,
Archie A.

PS: The application is as a gate driver for a PMOS 1.8V rail switch. The comparator's negative rail (V-) is driven by a charge pump inverter so as to supply sufficient gate drive to the MOSFET.

  • 0
    TI__Guru**** 164876 points

    Hello Archie,

    The mode does a test. if is mentioned in the model's text.

    If the input or supply rail goes beyond the abs max limits, the output will float at mid supply
    * If one or both inputs go beyond the commmon mode limit, the output will float at mid supply

    The disconnect between ground and comparator seems to confuse this test. 

  • 0 in reply to Ron Michallick
    TI__Genius 17475 points

    Hi Ron,

    Does this mean there is no solution for this simulation constraint? To internally disconnect the system's GND of the model and reference it to its Vee?

    Thank you.

    73,
    Archie A.

  • 0 in reply to ArTzy
    TI__Genius 11035 points

    Hi Archie,

    I applied a quick fix for this issue through editing the .lib file. I went ahead and remedied two issues:

    - The input range block had digital logic referenced to V- and V+. This is a known issue amongst the models; I've been slowly remedying this through model revisions.

    - The supply range block had minimum VCC referenced to GND (0) while the maximum VCC was referenced V-. I wasn't aware of this issue amongst the models, but I went ahead and fixed this one here.

    7484.TLV7011_sim2.TSC

    Below is the sim:

    Still a little bit of weirdness with VCC - BIAS, but the output should track the VCC now that the supply range and input range blocks are functional.

    Please let me know if you face any issues with my changes. I'd try to look for issues myself, but it's quite difficult to do an extensive validation of the model after the changes since I'm unable to find an unflattened netlist for this model. I've been debugging through plotting the internal nodes through referencing the simulation with the .lib.

  • +1
    TI__Genius 11035 points

    Hi Archie,

    Here you go:

    tlv7011.lib