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OPA615: OPA615: HOLDn switch inducted charge

Tom Eigenheer
Prodigy 121 points

Part Number: OPA615

Using the OPA615 as an SOTA as shown below:

image.png

The stability of the circuit seem to be fine and behaves as simulated. I know that the Hold Capacitor is small but this is necessary for the required track time. Increasing the Hold Capacitor will ease my in the folllowing presented problem but is not really an option.

Problem is what seems to be the switch inducted charge when switching to hold mode. In the picture below, the yellow signal (CH1) is showing the S/H_out with an additional gain of 5.33 and the blue singal (CH3) is the HOLDn signal with 200ns period and 40ns duty. For this measurement the OP615 is sampling GND-potential. 

image17849.png

The problem is not the induced Offset but its variation in time that appears as "low-frequency" noise. As the measurement shows, the minima of the S/H_out signal during HOLDn "high" is representing the "true" Signal. But the induced offset that appears after HOLDn goes "low" is not a constant but changing.

So I need to know if this is expected behavior of the device or is there potential to improve?

The HOLDn Signal is appearing well enouth on the scope, it is perfectly separated by GND-Plane in the layout from analog parts. I do not think that the effect is dielectric absorbtion of the Hold-Capacitor, since the absorbtion would be in the same range as the original charge. I also experimented with different quiesent currents Iq ranging from 8 to 13mA. Tryed different Logic Levels for HOLDn. The OPA615 decoulpling capacitors 4u7F, 100nF and 1nF at each rail to GND.

Is the OTA-Part fine with bounded to GND at B and E or will it oscillate or drawn extra power? Could the "high" resistance at In- at the SOTA Input be a problem? Are NC pins fine with floating?

I felt in exitement working with this device and hoping to get this last remaining problem solved.

Best regards,

Tom

  • 0
    TI__Mastermind 32405 points

    Hello Tom,

       Yes, true the capacitance does seem small and having the base and emitter will draw extra power. NC pins are fine with left floating. 

    1. When you mention: "I also experimented with different quiescent currents Iq ranging from 8 to 13mA." This means you changed Rq (R654 and R657 in your schematic) from 3kOhms to 300Ohms? It doesn't look like you are using the OTA section of the device, therefore, this will only affect the operating current and bandwidth/AC behavior of the OTA portion of the device

    2. Can you have the resistor at base (Rb) be 100Ohms and the resistor and emitter (Re) be 50 ohms? The collector can be left floating as you have done in your schematic.

    3. At your hold capacitance, can you try adding a resistance in parallel. You can try this by mounting the resistor on top of the capacitor. Try 1kOhm then go up to 100kOhm. This will help the output signal decay faster which might be what you are seeing as the changing offset. 

    Thank you,

    Sima