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OPA818: Unexpected DC offset that doesn't match datasheet

steve smith1
Intellectual 360 points

Part Number: OPA818

Hi TI support.

I've been getting some unexpected DC offsets from your part when using your part as a 7.5Meg TIA. For testing we also add a 7.5Meg resistor from inverting input to ground so non inverting gain is x2. What we see on several parts is a 100mV DC offset on the output. Looking at the datasheet for room temperature we see 25pA maximum so x  7.5Meg gives 187uV (way less than 100mV observed). Also datasheet says 1.2mV input offset voltage at room temperature so 1.25 x 2 = 2.5mV offset. So based on worst case datasheet values offset should be less than 3mV. The evaluation board gives 100mV offset and on our board using this part we see 25mV offset (both much higher than datasheet implies). Is the datasheet wrong, are the parts not meeting specification, or is there some sneaky parameter that's there in the small print ? Any suggestions ? We can't lower the transimpedance because we need to measure down in nA range.

  • 0
    Intellectual 360 points

    As a sanity check I located another OPA818 evaluation board. This one is identical in circuit to the others but this one has only about 3mV DC offset which is much closer to what I'd expect from the datasheet so am leaning towards OPA818 having much wider variation than datasheet would imply because I'm seeing widely different results and two of these are ti evaluation boards. Will be interested to hear your perspective, is this a known issue ? Best Steve

  • 0
    TI__Mastermind 32355 points

    Hello Steve,

      I want to make sure I understood the setup correctly.

    1. First you had it configured as a TIA with a gain (feedback resistor) of 7.5MOhms. While testing, you found unexpected DC offsets in your TIA configuration.
    2. Then, you had it configured as a regular voltage feedback amplifier with 7.5MOhm RF and 7.5MOhm RG as a debug step. During testing, you found 100mV DC offset at the output.

      If above is true, the reason you are seeing such a high DC offset is because of instability. In the voltage feedback amplifier configuration case, the gain as you mentioned is 2V/V. This is lower than the needed stable gain of the part which is 7V/V, since this device was purposely decompensated to achieve high bandwidth. Here is a quick app note explaining the benefits to decompensated amplifiers especially in TIA configurations: https://www.ti.com/lit/an/slyt767a/slyt767a.pdf.

      Also, since you are using high resistor values, you would need to compensate stability with input/feedback capacitors as you would do for a TIA configuration. For your first case with TIA configuration, I would need to more details about your input/feedback capacitors to determine if there is a stability issue when you saw the high offset voltages.

      For your follow-up reply, is the identical circuit tested in the TIA case or the debug VFB configuration case? If the former, please provide your input/feedback capacitors on your board.

    Thank you,

    Sima