Hi TI support.
I've been getting some unexpected DC offsets from your part when using your part as a 7.5Meg TIA. For testing we also add a 7.5Meg resistor from inverting input to ground so non inverting gain is x2. What we see on several parts is a 100mV DC offset on the output. Looking at the datasheet for room temperature we see 25pA maximum so x 7.5Meg gives 187uV (way less than 100mV observed). Also datasheet says 1.2mV input offset voltage at room temperature so 1.25 x 2 = 2.5mV offset. So based on worst case datasheet values offset should be less than 3mV. The evaluation board gives 100mV offset and on our board using this part we see 25mV offset (both much higher than datasheet implies). Is the datasheet wrong, are the parts not meeting specification, or is there some sneaky parameter that's there in the small print ? Any suggestions ? We can't lower the transimpedance because we need to measure down in nA range.
