TLV3901: Comparator Output Behavior Clarification

Hi Danilo,

How are these nodes being probed? Are you able to share some oscilloscope waveforms or schematics? How do the outputs look if you increase the input differential?

The current measurements are for DC Levels. We are validating first the static performance of chip. There is no need for waveforms, even in the scope it is straight lines. Once we get the static measurement proper then we will moving towards dynamic performance of chip. The data we have given is very detailed and self explanatory. 

Hi Bhoomika,

Thanks for clarifying that you are doing DC tests here. I read over your design circuit, but there isn't anything there that is readily pointing to why you are observing the outputs not fully swing differentially. As such, I need to ask some clarifying questions on my end to fully understand the set up and to debug this issue. 

Are you using the TLV3901EVM to run these tests? If not, please share a schematic of the board you are testing the TLV3901 with.

I want to confirm the output load on Q and Q/. CML outputs operate by steering ~16mA across resistors connected to VCCO. Please see below:

Comparator Output Types

The swing will change depending on the loading of the outputs.

We will explain the circuit below again. 

TLV3901 :  VCCO is connected to 3.3V, VCCI is connected to 5.2V, VTN and VTP are floating. We have provision to connect  0V or 91mV at VP input. We have a provision to change VN from 0V to 200mV [ Using a DAC] . We have connected LE pin is connected to ground through 470 ohm and LE/ pin is floating. Hysteresis pin is connected to ground via 750 ohm.

The outputs QN and QP are connected to HMC746LC3C inputs. HMC746LC3C is a device supporting CML logic levels with inbuilt 50 ohm termination to VCC. We are loading TLV3901 at the digital output as per CML guidlines.

The issue we had raised earlier that QP and QN are not at proper CML logic levels as explained earlier, remains as a question to be answered .

If the device really supports hysteresis, QP and QN shall be either less than 2.9V or close to 3.3V depending on the logic level. The voltage level like 3.15V is not correct. We are asking for clarification on this.

We will also appreciate if you can clearly explain the hysteresis as supported by TLV3901 [The device is not working as per the hysteresis, expected normally] . The device seems to be having a design problem when the voltage difference between VN and VP is below some level and defenitly below 40mV. 

We will appreciate if TI can investigate thoroughly the hysteresis capability of TLV3901 and let us know if there is any problem.

The analog device part ADCMP572 defines a parameter called Gain  (more than 50db). Does TI have any test result for the Gain.

We will appreciate if you can look at our inputs seriously, give sufficient thought, discuss with design team of TLV3901 and provide us with a clear technical answer.

Please let us know whether there is any errata sheet or  performance deviation note published by TI for TLV3901.

Bhoomika

Thanks for your patience as we try to resolve the issue.  I am sorry that you feel we are not treating your post seriously.  Unless the device has been damaged, we agree that we see no issue with the setup you describe.  Since you provide no images of the setup, we will just have to accept the conditions as described.  Most customers simply share their schematic and waveforms as it makes things much easier. 

What is the supply current from VCCI and VCCO (understand that both VEE are connected to GND)? We would like to compare our EVM configured exactly as yours is.  Since this is a leadless package, are you using a socket or did you solder it down onto a PCB you created?  if soldered down, was it hand soldered or machine soldered?  

The only thing I don't see in your description of downstream device is what is VCC of HMC746LC3C connected to.  I assume itis the same 3.3V as you mention for our VCCO.  As a trouble shooting option, have you tried to look at the TLV3901 output without the HMC746LC3C connected.  I am just trying to rule out any factors other than the TLV3901.  Since the output simply steers 16mA through the internal (50 ohms) and external (50 ohms) for total of 25 ohms in parallel, I can't imagine how you would get anything other than close to 400mV swing on each output, unless device is damaged or not properly soldered down.

Lastly, is the issue only observed on one device?  Any chance you can get an EVM from us to experiment with?

Chuck

The downstream device HMC746LC3C is powered with 3.3V. This being a CML device the power supply should be  typically 3.3V. We have assembled 3 cards with TLV3901,directly source from Texas Instruments. All are behaving the same way. All the cards were assembled in a automated assembly facility. 

We strongly believe that the Ti device has a fixed gain from input to output. The hysteresis do not seem to be implemented in the standard way. The best analysis going forward, in my opinion is as follows.

Please use your evaluation board and please try out the following tests:

1. Apply a differential voltage between VP and VN of 25mV, 20mV, 15mV, 10mV and 5mV in the EVM. Please observe the outputs QP and QN.

We think, based on our observations, you will observe  both QP and QN to be around 3.15V and not have 400mV difference. The idea is to qualify TLV3901 for small differential inputs.

2. If you observe more than 400mV difference between QN and QP, we can proceed from our side with more observations as you suggested, like Isolating HMC746LC3C connection (ours is a high density board and disconnecting from QN,QP will mean desoldering the HMC746LC3C device).

Regards

Bhoomika M H

Hi Bhoomika,

I just wanted to update you on this issue. The current results we are seeing in the lab are inconclusive. We'll get back to you with an update tomorrow.

Hi Bhoomika,

Please give us some more time to review with our designers.