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OPA541: OPA541 Power off sequence

Christoph Schmidt38
Prodigy 40 points

Part Number: OPA541

Hello,

in the datasheet of the OPA541 there is mentioned, that the maximum voltage at In+ or In- should be +VS.
This requirement is met during normal operation.
During the power off sequence voltages begin to drop. In this situation the voltage on IN+ can excced the dropping VS+. Maximum around 1V a short time, later around 250mV some more time (settlement process).
I have a 220 Ohms series resistance at the IN+ pin, and measured diectly at the pin.


Could this led to damage of the PowerOpAmp?

Looking forward to your answer and thank you very much,
Christoph

  • 0
    TI__Mastermind 18106 points

    Hi Christoph,

    You are correct in your thinking, It is important to validate that the device will not sustain damage during power on/off. 

    Is this max ~1V appearing at the DUT IN+(option 1) pin or appearing on the other side of the 220Ohm resistor (Option 2), or something different than I have illustrated? 

    Also, is VS+ floating or forced to 0V during this period? 

    While overstress can absolutely damage parts, it is not uncommon to see our devices survive events like this, especially when we have source impedance between the pin and source voltage. 

    The resultant input current will help determine if damage occurs in the device. Generally, we give a blanket 10mA or less requirement to help protect input ESD cells. 

    Knowing the configuration of the supply rails, and if the 1V appears before the 220Ohm resistor will help determine if this condition is of concern. 

    Thanks,

    Jacob

  • 0 in reply to Jacob Nogaj
    Prodigy 40 points

    Hi Jacob,
    thank you for your fast reply.
    I measured directly at In+, as in your option 1.

    Please refer to this scope screenshots:
    Ch1: IN+
    Ch2: +VS
    Ch3: not relevant
    Ch4: -VS



    Best regards
    Christoph

  • +1 in reply to Christoph Schmidt38
    TI__Mastermind 18106 points

    Hey Christoph, 

    I see now, thanks for the curves. What is likely to happen is as I show below, where the ESD diode likely forward conducts to VCC rail.

    So long as this inrush current is below 10mA (preferably below 1mA), there should be no issue with overstress voltage. 

    Worst case, I am sure we could likely size this IN+ resistor up in value if we find that there is too much IN+ current during power down. 

    Thanks,

    Jacob

  • 0 in reply to Jacob Nogaj
    Prodigy 40 points

    Thank you for your advise! Seems that there should be some changes in my circuit.