LMH5401: Periodic overdrive

Part Number: LMH5401
Other Parts Discussed in Thread: ADC3669,

Dear Technical Support Team,

I have a question about the LMH5401 in the ADC3669EVM-DC. The LMH5401 is a dual-supply device operating at 3.5 V and -1.1 V. The signal I want to measure with the ADC is -200 mV, which is amplified 4 times by the LMH5401 (to 800 mV with VCM = 1.4 V) and then fed into the ADC3669. However, a signal of approximately -1 V is periodically applied.

ADC3669EVM: Gain adjust for ADC3669EVM-DC - Data converters forum - Data converters - TI E2E support forums 

Q1

Can the -1 V signal be ignored as it is clipped due to overdrive? Or should I protect the input from the SMA with a clamping diode?

Q2

What time scale does the “overdrive recovery” value of 300 ps or 400 ps in the datasheet refer to? Is it on the order of a few ns, as stated in the datasheet? If overdrive occurs for a duration of 10 ns or less, will the recovery time be longer?

Q3

Is it acceptable for overdrive to occur periodically as long as it does not exceed the absolute maximum rating?

Best Regards,

ttd

  • Hi Team,

    I have tried to simulate LMH5401(G=4,-1V input, 3.3V and -1V dual supply).

    LMH5401_SEtoDIFF_forADC3669.tsc

    It seems to be clipped about 2.1V. I guess that VOCRH is 3.3V - 1.2V = 2.1 V.

    Is my understanding correct?

    Best Regards,

    ttd

  • When you say -200mV and -1V input voltages are you talking about DC inputs? By default the ADC3669EVM-DC has an AC coupled input so these DC voltages won’t reach the input of the LMH5401 device. Unless you replaced C134 and C139 with 0ohm resistors.

    For your questions above in your first message, I'm going to assume you've configured the EVM for a DC coupled input.

    Q1: With supply voltages of VS+ = 3.9 V and VS- = -1.1V the abs max input range of the device in this configuration is (VS− − 0.7 V to VS+ + 0.7 V) which equates to approximately −1.8 V to +4.2 V. So applying a -1V signal at the input occasionally does not violate the abs maximum of the device. This means that a protection circuit or clamping diode is not necessary.

     Q2: The over drive recovery value of 300ps with a 5V supply and  400ps with a 3.3V supply, is measured from the point the output signal is lowered below the saturation limit, to the point  when the output waveform tracks the expected waveform. 

    Q3: We do not measure the performance of the device over a long period of time where periodically the device is over driven momentarily. I feel your described implementation would not result in damage to the device but I'd recommend that you run some tests to verify your specific overdrive conditions of your application don't degrade the part.

     

    Yes it appears you are reaching the Vout range high limit. I noticed your Rs in your simulation file was 0ohms, what is the source impedance of the device that will drive the LMH5401? I'd suggest you put in your expected source impedance in you simulation and apply VMID between R9 and R10 at the output.  This will mimic the common mode voltage being applied by the ADC.

    Regards,

    Andrew

  • Hi Andrew,

    Thank you for your answer.

    You said:

    When you say -200mV and -1V input voltages are you talking about DC inputs?

    →There is an offset voltage of several tens of mV. When the power is switched, a -1 V pulse occurs,

     followed by a -200 mV pulse (approximately 10 ns wide). The offset voltage and this -200 mV pulse are the values I want to capture with the ADC.

    You said:

    I noticed your Rs in your simulation file was 0ohms, what is the source impedance of the device that will drive the LMH5401? I'd suggest you put in your expected source impedance in you simulation and apply VMID between R9 and R10 at the output.  This will mimic the common mode voltage being applied by the ADC.

    →Yes, I will  replaced C134 and C139 with 0ohm resistors for DC input.

    You said:

    There is an offset voltage of several tens of mV. When the power is switched, a -1 V pulse occurs, followed by a -200 mV pulse (approximately 10 ns wide). The offset voltage and this -200 mV pulse are the values I want to capture with the ADC.

    →The LMH5401 has a 50-ohm input. I've added a simulation file with a 50-ohm input and VIMD = 1.4 V.

     Should I set VG from 0 to -400 mV so that the level is halved at -200 mV @ 50 ohms?

     The LMH5401 has a 50-ohm input. I’ve also added a simulation file with 50 ohms and VIMD = 1.4 V. Should I set VG from 0 to -400 mV so that the level is halved at -200 mV @ 50 ohms? Also, I believe a 50-ohm resistor is connected to simulate the ADC’s internal circuitry—when a signal is applied to INp/INn, will the level be half that of the differential VOUT signal, as seen in VOUT_ADC?

    LMH5401_SEtoDIFF_forADC3669EVM_DC.tsc

    Best Regards,

    ttd