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INA181: Failure mode

William Deshaies1
Prodigy 20 points

Part Number: INA181
Other Parts Discussed in Thread: TPS63802

Hello,

I would like to confirm a possible failure mechanism with the INA181A1IDBVR.

Setup:
- VS is supplied from an MCU GPIO (3.3 V when on, 0 V when off), with 0.1 uF bypass.
- REF is driven by a DAC (MCP47CVB02) at 0.5 to 1.65 V, and stays driven while VS is off. The DAC can source 6 to 14 mA into a short.
- IN+/IN- sit across a 0.05 ohm high-side shunt at 0 to 5.9 V.
- OUT drives the FB pin of a TPS63802 to regulate LED current.

After some time in the field, one device's output stays at 0 V regardless of sense current.

Questions:
1. With VS = 0 V and REF at 0.5 to 1.65 V, does current flow into REF through an ESD structure to VS, and roughly how much would it be?
2. Can this condition cause latch-up or damage when VS is then applied?
3. Is an output stuck at 0 V consistent with that kind of damage?
4. Would a 1 to 2 kohm series resistor on REF be an acceptable fix, and what effect would it have on gain error and CMRR?

Thank you,

William Deshaies

  • +1
    TI__Mastermind 26665 points

    William, 

    Here is some context to your questions: 

    Questions:
    1. With VS = 0 V and REF at 0.5 to 1.65 V, does current flow into REF through an ESD structure to VS, and roughly how much would it be?

    - Yes, and this is likely your potential failure mode, as the REF pin may only be 300mV higher than the VS pin at any time:

    With the supply powered down, the ESD cell will activate with REF still active in the system. The actual magnitude of current here into the pin is impossible to say, as it would be a complex value of the part itself, the system, and status of things inside that system. I can say the ESD cell sits external the resistive networks of the device, so they are not providing any resistive damping here. You are likely feeding whatever voltage the DAC is creating directly to the ESD cell. 


    2. Can this condition cause latch-up or damage when VS is then applied?

    - Yes, this can certainly cause damage to the device. 

    3. Is an output stuck at 0 V consistent with that kind of damage?

    - Yes, I believe damage to the output stage yielding a latchup to GND could be a potential failure mode here. 

    4. Would a 1 to 2 kohm series resistor on REF be an acceptable fix, and what effect would it have on gain error and CMRR?

    - You could certainly try this, but sequencing would be the better solution here. The issue with the current throttling resistance here removes the low impedance of the DAC, and this additional resistance will lead to error in the system. Check out this app note for more information.