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Questions about LMP91000 datasheet

Martin Mensch
Prodigy 110 points

Other Parts Discussed in Thread: LMP91000

Hi,

I am just taking a closer look at the LMP91000 datasheet and there were some questions coming up. Would be great to get some clearifying words:

- R_TIA: if I connect an external resistor between C1 and C2 and select a TIA_GAIN other than external resistance which will be the active resistance value? Or in other words, will the external resistance be disconnected?

- TIA: Is there also a value for the input bias current of the TIA?

- A1: What is the precise meaning of V_OS_RW? I am especially interested in A1's offset voltage (with offset voltage defined as in standard opamp data sheets). If that is +/-550µA Max and Min what are typical values?

- FET: the shorting FET should normally be conducting if power is off. How is the integrated FET behaving at power off?

Thank you very much

Martin

  • 0
    TI__Intellectual 2630 points

    Martin,

    R_TIA: The active resistance value will be the parallel of the resistance gain selected (TIA_GAIN) and the external resistance between C1 and C2.

    TIA: Looking into this.

    A1: One of the goals of the potentiostat is to maintain RE and WE and the same voltage for zero bias electrochemical cells or at a set bias for cells that require a biasing. V_OS_RW spec states what the max deviation (in voltage) is over temp. For zero bias cells (BIAS = 0% VREF) this deviation from RE = WE would be at most 550uV.

    FET: FET switch is open with no power when chip is completely off. But you can still enable (close) the FET switch in super low power Deep Sleep mode.

  • 0
    TI__Genius 9655 points

    Hi Martin,

    just to complete the answer given by Jason, the bias current of the TIA of the LMP91000 is less than 1nA.

    regards,

    Domenico

  • 0 in reply to Jason Seitz
    Prodigy 110 points

    Hi Jason,

    thank you for your answer.

    A1: What is looking strange to me is that WE pin is not the negative input of TIA and so it is not necessarily at the inner zero potential (which is output at AGnd pin right?) Is the possible voltage at the load resistor calculated into the 550µV? That's why I would welcome the pure A1 opamp specifications.

    Also it would be great to know typical values or ranges in smaller temperature ranges. The basic reason for my question is that I don't think 550µV is a good value.

    Thank you very much.

    Martin