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ADC buffer question

Other Parts Discussed in Thread: OPA336, LM358

Bill,

 

This reason that you have not found any literature on driving the output of single supply amplifiers to ground is that it is not recommended. I know that you have placed a diode at the output and you are trying tricks to pull the output down to ground however you may see significant linearity problems near ground.

 

There are some single supply amplifiers that will get you close. The OPA336 comes with in 3 mV from the rail ( http://focus.ti.com/docs/prod/folders/print/opa336.html ). With this device you will get close to ground but you may still have linearity problems lower that 200 mV.

 

Typically, designers boost the signal going through the amplifier with a level shift of some sort. You can use the reference of the ADC to accomplish this. I do have some circuits that will help you accomplish this if you are interested. Please let me know.

 

 

Best Regards,

 

Bonnie Baker

Sr. Applications Engineer

Data Acquisition Products

Texas Instruments, Tucson


From: William Twomey [mailto:w.twomey@gmail.com]
Sent: Friday, October 23, 2009 5:32 PM

Hello Bonnie,

I'm a fan of your EDN articles and am currently reading your book - A Baker's Dozen - which I have enjoyed so far.  I appreciate that your EDN articles dive into real world and issues and have some real substance to them.

I have a general question about using single sided op-amps as ADC buffers I was hoping you could shed some insight on.  I like using single sided rail to rail amps in front of ADCs to protect them from over/under voltage without the use of extra protection circuitry.  The signals I commonly deal with, however, need to be read accurately down to ground.  Since the output of single sided amps have trouble reaching ground, I'm thinking that I can use a diode on the output of the amp with the feedback connected after the diode to force the output of the amp up ~0.6V, well into its linear region (I'm not concerned up the drop in the upper output limit).  I was also planning on using a weak pull down resistor after the diode to help the output touch ground.

I figured this would be a common practice and have looked around for AP-Notes or articles discussing such a method but haven't really found anything.  This makes me a little nervous and so I'm wondering if I'm missing a big negative or drawback to this approach.  I ran a PSPICE simulation and the concept seems to work but I know real world results can be different.  Is there anything I'm missing?  Any insight would be greatly appreciated,

Thanks and Best,

Bill Twomey

  • Hi Bonnie,

    Thanks for the response but I'm not sure I understand why there would be linearity problems near ground as the output of the amplifier will actually be up around 0.5V which should be in its linear region.  Am I missing something?

    I was thinking of using the op-amp in a difference configuration with a precision reference to shift up the voltage - maybe this is what you are referring to - but my concern is that the signal source looking into the sense circuit won't see a resistance to ground, but a resistance to an offset voltage.  Maybe this isn't a problem but I think it is probably preferable to have the source see resistance to ground.

    Thanks and Best,

    Bill

  • Bill,

    Could you send me a circuit diagram? I think that the diagram would clear up my confusion.

    Best Regards,

    Bonnie

  • Bill,

    I now see what you are talking about. I don't think that you have solved anything with your diode. If the output of your amplifier circuit is forced to ground there will be zero current conducting thorugh your 10 k load resistor and hence the diode will not be turned on. As you can see, the diode is not an "ideal" battery at 0.6V but the voltage drop does change across that diode with changes in the current through it. I don't think that this circuit will give you what you want.

    Best Regards,

    Bonnie Baker

  • Hi Bonnie,

    I built a couple of protos with and without the the diode configuration.  You were right as the diode circuit showed no improvement over the other circuit.  Both circuits were able to get to 0.8mV from ground with a 0V input and a light load (15kOhms) to ground on the output.  With the diode completely off, I thought the 10k resistor would provide a perfect 0V, but it looks like the inverting input of the amplifier is what is actually raising the output 0.8mV.

    In any case, it looks like with high impedance on the output (which the ADC will provide) the amplifier will be able to drive low enough on its own.  I understand the linearity issues associated with going to ground on a single sided amp but as I'm dealing with slow moving signals - essentially DC - I'm not worried about that.

    Thanks for the help,

    Bill

  • Bill,  I don't know if you are out of the woods yet. If this input of the op amp is limiting your output swing to 0.8 V above ground I would suggest that you rethink that device. You state on your circuit diagram that it is a single supply amplifier. I am curious what part number you are using.

    A second issue to think about, even though your are testing DC is the proper configuration for driving your ADC. The input of the ADC is not really "high-impedance" but is can be characterized as a capacitor. The capacitor at the input of your ADC charges and discharges quickly as you convert.

    Maybe the best place to start is with your amplfier. Let me know what part you have and I will suggest an appropriate interface circuit to the ADC.

     

    Best Regards,

    Bonnine Baker

  • Hi Bonnie,

    My testing has shown the output swing down to 0.8 millivolts (not volts), which seems easily acceptable for this application.  For testing I've been using a LM358 as reaching the upper rail is not important in this application.

    You mention the input capacitance effect of the ADC, and I was planning on using a RC buffer in front of the ADC so that the buffer cap can provide the majority of charge to the ADC during a sampling and the op-amp can then settle the output back down if necessary during the delay between samples.  My thinking was this would account for any high frequency limitations of the amp, especially at low output voltages.

    Thanks and Best,

    Bill

  • Bill, this sound great. Might I suggest that you take a look at the document attached as you design your R/C buffer.

    EDN oct 16 2008 op amp and rc load oljaca and baker.pdf