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Output Phase Reversal on OPA 544

Other Parts Discussed in Thread: OPA544

Has anyone seen what appears to be an output phase reversal problem on the OPA544? I am using it in a follower configuration. The device is powered on +/-17VDC. When the non-inverting input goes below -14V, the output suddenly reverses phase. I have tried various limit resistors on the input, but they don't seem to help.

  • Jay,

    This phase reversal is real and as you have observed is an artifact of exceeding the input common mode voltage range.  This is a common phenomenon in power amplifiers that have JFET input stages.  Since the OPA544 lower rail is specified to V(-) + 6V, you need to create a divider or a clamp that limits the voltage seen at the inputs of the OPA544 to -11V.  I know that right now you are not seeing this phase inversion until the common mode voltage hits -14V, but with process variation this could get as bad as the worst case specification.

    Matt

  • There are at least two solutions to this problem:

    1) Limit the input range (by voltage dividers, clamps, etc.) as suggested by Matt.  This requires being conservative enough to stay within the worst-case allowable common mode range specified in the datasheet.

    2) Place two small-signal diodes in parallel (facing in opposite directions, to act as an AC voltage clamp) between the inverting and non-inverting inputs of the OPAMP buffer.  This will have a negligble effect on the circuit during normal operation.  If the amplifier is ever driven out of its allowable common mode range, the phase reversal of the output will be fed back to the non-inverting input through either of the diodes, which will effectively reduce the applied input voltage and pull the amplifier back into the allowable common mode range.   This feedback occurs so quickly that the amplifier is actually prevented from ever going into a complete phase reversal.  I have successfuly implemented this in several designs and it works quite well.  NOTE: This solution requires that the input of the buffer is driven from something other than a true voltage source.  In most cases, buffers are only added when the signal source is not a true voltage source, so this solution would work in most cases.  Also note that the input impedance of the buffer decreases dramatically when the buffer is on the verge of phase reversal.