I am doing some preemptive planning for a small board for the OPA564. I would like to confirm the current carrying pins so I can have an idea of proper routing and thickness of traces.
There are numerous power supply pins on this device in what it seems, at least at this hour, strategically placed to make PCB routing a pain. Here is my SWAG from reading the datasheet:
V+PWR and V-PWR are current carrying (amperes) paths and are strictly bonded to the output stage. V+, I assume, is the analog voltage for the device and is required to be the same potential as the V+PWR pins and is responsible for proper biasing of the analog innards (class AB stage, biasing, etc. etc.) V- is the ground reference for the analog supply.
Vdig is probably powering smaller voltage devices for the logic thresholds responsible for the temp sensor, flags, and enable/shutdown.
If so, my thoughts would be simply adding vias for the V- pins down to a big, fat ground (thermal) plane (application is single supply, FYI). Thin traces can be used for V+ and Vdig since they are not heavy current carrying paths. I plan to have thick traces from V+PWR to a banana jack and probably the same for V-PWR.
Can you confirm my reasoning?
Also, if there is preliminary info for a TI board as an example it would be nice for an example layout. Even suggestions for Power Amp layout guidelines would be nice (cound't find any on the site). No one wants to reinvent the wheel!
-Ken