Hello,
Regarding figure 4 on the OPA452 datasheet, I think that this data was measured on the JEDEC specification test board.
Is this circuit board 2s2p board? Or is this 1s board?
Best Regards,
Ryuji Asaka
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Hello,
Regarding figure 4 on the OPA452 datasheet, I think that this data was measured on the JEDEC specification test board.
Is this circuit board 2s2p board? Or is this 1s board?
Best Regards,
Ryuji Asaka
Hello Asaka-san,
I searched the information in our OPA452 archive regarding the about the basis for the Figure 4 graph. Nothing specific about it was found; however, I did get a lead to someone who was involved with the power amplifier thermal work about 15 years ago and he is still with TI.
I explained to him that we were attempting to determine if Figure 4 for was based on the JEDEC 1s (low-k), or 2s2p (high-k) test board. He said it wasn't exactly either one. It turns out that the the test was conducted using a double-sided, 0.062" board, with 1-oz copper on each side. The circuit board copper areas as shown in Figure 4 were etched so that had equal copper area on each side of the board. There were no vias used between the two copper planes.
Although the Figure 4 board isn't exactly equivalent to the 2p2s test board, it is closest to that board configuration.
Regards, Thomas
PA - Linear Applications Engineering