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Op-amp interface to ADS42LB69

SM
Expert 1750 points
Other Parts Discussed in Thread: ADS42LB69, LMH3401, LMH6554, LMH5401, THS4509, THS4508

Hello,

     Please advise on an op-amp driver circuit for the ADS42LB69. The maximum input frequency in my application is 50MHz. 

Also, there are two types of driver op-amps available, 1) single supply 2) dual supply.

There are reference circuits for other ADCs that in some cases use single supply (and hence shift the input signal to the ADC's dc offset). In my understanding this will require that the input be AC-coupled (through a series capacitor maybe) thus limiting the lower range of input frequency. 

The dual supply op-amp will probably have the differential swing around 0V and hence does not restrict the low frequency response. 

May I ask if the above is the only reason for choosing between single and dual supply adc driver op-amps or are there any reasons like noise, bandwidth?

Also, should a current feedback opamp be used or a voltage feedback opamp? 

Thank you for your time in looking into my case.

  • 0
    TI__Genius 12631 points
    Hello,
    For the ADS42LB69 in particular, the opamp specifications are 1.9V common mode and 2.5Vpp differential input signal. For 2.5Vpp differential, it means each output will swing 1.25Vpp around the common mode => hence 1.9V+0.625V=2.525V and 1.9V-0.625V=1.275V. So if you are using a fully-differential amplifier like the LMH6554 (current feedback) or LMH3401(voltage feedback) you are within the typical specifications of common-mode range and output swing range. So in this particular case you do not need to ac couple your signal. Using split or dual supplies is usually done to configure the amplifier in the sweet spot for the ADC and does not affect its other performance specs such as noise and bandwidth. An amplifier is completely floating so it doesn't know the difference between( 5V and GND ) and say (4V and -1V) supplies.

    The 2primary reasons for using current feedback topologies are:
    1. Gain bandwidth independence
    2. Increased slew rate.

    The LMH3401 has plenty of slew rate so this should not be a problem. Also, it is configured in a fixed gain of 16dB so it does have sufficient gain if needed. If you need a different gain then consider the LMH5401 which is not a fixed gain amplifier.

    Another option: the THS4509 has around 2GHz of bandwidth. I do think the THS4509/THS4508, both of which are voltage feedback amplifiers should be sufficient for your application needs.

    -Samir
  • 0 in reply to Samir Cherian
    Expert 1750 points

    Hello Samir,

    Thank you for your detailed reply.

    A few questions:

    We are planning to use the THS4509. May I ask you to please advise on the circuit. Figures 86 and 89 of the datasheet are for a AC-coupled input. We are interested in DC coupling.

    Also, what is the purpose of the 69.8E and 0.22uF shunt network at the input? The datasheet says they are for matching, could you please elaborate.

    Also, the ADS42LB69 has a VCM of 1.9V. Would it make sense to operate the driver with Vdd = 3.8V and Vss = 0V (so that VCM of driver is at mid-supply) or Vdd = 5V and Vss = 0V should also be fine?

    The ADC has a input buffer and so the input resistance is 10K (rather than a few Ohms in un-buffered ADCs). Please advise on the low pass front end filter design in such a case. Also, how much difference would it make if we had a single ended LPF before the driver amp?

    Thanks again,

    SM

  • 0 in reply to SM
    TI__Genius 12631 points
    SM,
    The 69.8 ohm in parallel with the 100 ohm will present a 50 ohm impedance to the source. The direct math is going to show the parallel impedance is 41 ohms but remember when going from single-ended to differential the right hand side of the 100 ohm resistor (common-mode input to the THS4509) is not GND but a moving signal so that synthesizes to a different impedance which results in a 50 oh match. This is only needed if you are operating in a 50 ohm matched system so if for example, your previous stage has a low impedance output and is close to the THS4509 you do not need to be in a 50 ohm system.

    The 0.22uF cap is there because of the ac coupling. If dc coupled all the 0.22uF caps can be removed and the resistors can be shorted to GND.

    To answer your remaining questions:

    1. What is the common-mode voltage of the incoming input signal?

    2. What is the gain configuration? Same as shown in Figure 86?

    3. I don't think you can work on 3.3V supplies and GND, because you have to take into account the common-mode and swing limitations of the amplifier.

    4. You also have to take into account any dc attenuation in the filter. To design your filter needed for the application you can use a tool like Elsie or Filter Free from NuHertz to design the differential filter. I personally use the latter.

    Please also simulate your circuit in TINA with amplifier and the filter and the input impedance model of the ADC- check the ac frequency response and also run a transient simulation to ensure that all your signals are within the amplifiers compliance.

    -Samir
  • 0 in reply to Samir Cherian
    Expert 1750 points

    Hello Samir,

               As per your advise, we modeled the opamp. May I ask you to please advise on how the differential input of the ADC can be modeled?

    This is what we did,

    R10 (1.2K) and C5 (4pF) in the right hand side of the schematic (the datasheet of the ADS42LB69 says the ADC differential input resistance is 1.2K and differential capacitance is 4pF). 

    --------------------------------------------------------------------------------------

    Question 2)

    I was looking at the datasheet of some other ADCs; in one of them the diff. res. was mentioned as 200E and the diff. cap. as 1.75pF.  May I ask how does this affect the performance of the ADC.

    --------------------------------------------------------------------------------------

    Question 3)

    If the differential res. is in parallel to the resistance, then a series resistor at the input will tend to make the ADC input pin as tap of a potential divider. Since the diff. resistance is going to much larger than the ext. series resistance, the voltage will larger remain the same. However this external series resistance along with the ADC's diff input capacitance will together form a low pass filter. Is this correct?

    --------------------------------------------------------------------------------------

    Question 4)

    Also, in some designs the external input circuitry comprises a series resistor and a shunt capacitor, so do both these capacitors (the external shunt capacitor and the differential capacitor inside the ADC) form the low pass filter? Since the capacitors are in parallel, the effective capacitance becomes: C_eff = C_ext_shunt + C_ADC_diff_inp_cap. Is this correct?

    Thank you for answering these questions in advance,

    SM. 

  • 0 in reply to SM
    TI__Genius 12631 points

    Hello,

     1. Page 61 of the ADS42LB69 datasheet shows how the input impedance is modeled and it is how you have modeled it. I am confused by Figure 111 which shows resistance varying across frequency which makes no sense. I would recommend contacting the high-speed ADC team on their E2E forum to clarify these graphs.

    2. I am not sure how the ADC performance varies, however the amplifier always performs better with a lighter load. A lighter load also means less attenuation. For example currently the attenuation from R7 (100 ohm) and 1/2 of R10 (600 ohm) = 600/700 = 0.86 and the amplifier drives a differential impedance of 1.2k + 100 + 100 = 1.4kOhm. Now imagine if the ADC diff input was 200 ohm. With the same circuit the attenuation would be 1/2 and the load would be 400 ohm. So in summary to get the same level of signal at the ADC inputs the amplifier will have to drive a larger signal while simultaneously driving a heavier load. This degrades the amplifiers linearity performance (HD and IMD).

    3. Correct,  there will be a low pass filter.

    4. Yes usually there is a shunt capacitance, but in those cases the ADC input impedance is low and the external amplifier usually drives the ADCs sampling cap directly. In that case an external charge-bucket shunt capacitor is used in order to charge the ADCs sampling cap. You can read more about it here.

    In this case however there is an internal buffer (Figure 115) so no charge bucket cap is needed. Again you can confirm this with the ADC team.

    I would have forwarded this post directly to my contacts on the ADC team for their confirmation, however because of the holidays many of the engineers are out. Posting on E2E directly will ensure that everybody on the ADC team can see this. You can link this post to your post to the ADC team in case they want further details.

    -Samir