PGA113: PGA113 - Vcal, Vref, Avdd, Dvdd - What do they do?

Hello Emmanual,

I can certainly help answer your questions. For the PGA113 you have the feature of calibration for the two important components that cause non-linearities of an ADC which are offset error and gain error. This calibration feature is utilized on CH0/Vcal pin. The pin has two options where it can be used for calibration or as an extra MUX channel for another signal chain input. If Vcal is tied to the ADC reference, then gain and offset calibrations on the ADC are easily accomplished through the PGA113 device using one MUX input.

For Vref, it is the reference input pin where an external reference can be tied for Vout offset shift or to midsupply.    

Generally Vref pin is either tied to ground or, for ease of scaling, to midsupply in single-supply systems where midsupply is used as a virtual ground.

For AVDD, is the analog supply voltage pin which power the PGA shown in the Function Block Diagram in section 8.2 (Page 20) of the datasheet.

For DVDD, it is the voltage supply for powering the analog output stage of the PGA and the SPI interface digital circuitry. This pin is also useful in multi-supply systems to prevent overvoltage and lockup condition of an ADC input.

The Zero-Drift provides ultra-low input offset voltage (Vos) and near-zero input offset voltage drift over temperature and time. For the PGA113 it provides low offset of 25uV typical and 0.35uV/C typical.

For your system application are you planning on using the calibration feature? What kind of system/use application is this going to be implemented in? I hope this helps clarify the functionality of the pins for this device. If you have anymore question or help reviewing your schematic for this device, please let me know.

Best regards,

Errol Leon

Precision Op Amp Applications