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High-resolution piezo amplifier design without discrete FETs

Paul Lander
Prodigy 230 points
Other Parts Discussed in Thread: OPA1642, OPA1652, TL072

Hi,

Piezo-electric sensors present a very high impedance small-signal voltage or charge source. Typically, a differential signal is inputted to a discrete pair of matched ultra low-noise JFETs, biased with a current mirror. I am wondering if there is a IC op-amp approach available today, that does not require very large resistors, and is ultra low-noise. My application requires a modest bandwidth of 25 - 1,500 Hz and low slew rate. I can tolerate input offset voltages of up to 20 mV. I am constrained to use a single ended supply of 0 V to up to 15 V.

Thanks,

Paul Lander

  • 0
    TI__Guru* 93105 points

    Hello Paul,

    About the best noise we can achieve with a JFET input op amp is 5 nV/rtHz  at 1 kHz. That is the voltage noise spectral density for the JFET input OPA1642. Its input bias current is typically +/-2 pA, and +/20 pA, at TA = 25 C.

    The OPA1642 can be operated using a single supply. The lower common-mode voltage (VCM) limit is (V-) - 0.1 V, and the higher limit is (V+) - 3.5 V. That limits the high-end VCM to about +11.5 V with a +15 V supply. The output can swing to within about 200 mV with a 10 k load, and 350 mV with a 2 k load.

    You can view the OPA1642 datasheet here:

    There are other TI JFET input op amps that might be considered, but the noise is a little higher.

    Regards, Thomas

    PA - Linear Applications Engineering 

  • 0 in reply to Thomas Kuehl
    TI__Genius 12325 points

    In addition to Thomas' suggestion, I wanted to also recommend the OPA1652, which is a CMOS amplifier (MOSFET input, rather than JFET) that achieves 3.8nV/rtHz broadband noise spectral density.

  • 0 in reply to John Caldwell
    TI__Guru**** 164396 points
    Paul,

    If 18nV/rtHz at 1 kHz is ultra low noise in your opinion then TL072 also works.
  • 0 in reply to John Caldwell
    Prodigy 230 points
    Hi Thomas, John,

    Thanks a lot for the information. With respect to Ron's suggestion, I think our piezo application is typical in that 2 nV / rtHz and less could be considered ultra-low noise. The op-amp advantages are very attractive - total circuit cost, power, voltage, tight specs - and 3.8 nV/rtHz might be a good trade-off. I would like to try the op-amp approach side-by-side with LSK389A matched JFETs so I'll make a PCB that can do both.

    If possible, would you be able to give any circuit references, or just design pointers, to implement a true differential input with over-voltage input protection? I'm pretty much constrained to use the piezo as a voltage source because my product lives outdoors and that rules out using resistance paths over about 50 kOhms because of humidity and environmental degradation.

    Paul